diff --git a/nac3standalone/demo/check_demo.sh b/nac3standalone/demo/check_demo.sh index d481af85..9bd7d995 100755 --- a/nac3standalone/demo/check_demo.sh +++ b/nac3standalone/demo/check_demo.sh @@ -14,12 +14,31 @@ while [ $# -gt 1 ]; do done demo="$1" -echo -n "Checking $demo... " -./interpret_demo.py "$demo" > interpreted.log -./run_demo.sh --out run.log "${nac3args[@]}" "$demo" -./run_demo.sh --lli --out run_lli.log "${nac3args[@]}" "$demo" -diff -Nau interpreted.log run.log -diff -Nau interpreted.log run_lli.log -echo "ok" +echo "### Checking $demo..." -rm -f interpreted.log run.log run_lli.log \ No newline at end of file +# Get reference output +echo ">>>>>> Running $demo with the Python interpreter" +./interpret_demo.py "$demo" > interpreted.log + +echo "...... Trying NAC3's 32-bit code generator output" +./run_demo.sh --out run_32.log "${nac3args[@]}" -s 32 "$demo" + +echo "...... Trying NAC3's 32-bit code generator output with --lli" +./run_demo.sh --lli --out run_lli_32.log "${nac3args[@]}" -s 32 "$demo" + +echo "...... Trying NAC3's 64-bit code generator output" +./run_demo.sh --out run_64.log "${nac3args[@]}" -s 64 "$demo" + +echo "...... Trying NAC3's 64-bit code generator output with --lli" +./run_demo.sh --lli --out run_lli_64.log "${nac3args[@]}" -s 64 "$demo" + +diff -Nau interpreted.log run_32.log +diff -Nau interpreted.log run_64.log +diff -Nau interpreted.log run_lli_32.log +diff -Nau interpreted.log run_lli_64.log + +echo "...... OK" + +rm -f interpreted.log \ + run_32.log run_lli_32.log \ + run_64.log run_lli_64.log \ No newline at end of file diff --git a/nac3standalone/src/main.rs b/nac3standalone/src/main.rs index 78c7ff91..12a442b0 100644 --- a/nac3standalone/src/main.rs +++ b/nac3standalone/src/main.rs @@ -73,6 +73,10 @@ struct CommandLineArgs { #[arg(long)] mcpu: Option, + /// The number of bits of `size_t` of the NAC3 code generator. + #[arg(short = 's', default_value_t = usize::BITS)] + size_t_bits: u32, + /// Additional target features to enable/disable, specified using the `+`/`-` prefixes. #[arg(long)] target_features: Option, @@ -241,11 +245,22 @@ fn handle_assignment_pattern( } fn main() { - const SIZE_T: u32 = usize::BITS; - let cli = CommandLineArgs::parse(); - let CommandLineArgs { file_name, threads, opt_level, emit_llvm, triple, mcpu, target_features } = - cli; + let CommandLineArgs { + file_name, + threads, + opt_level, + emit_llvm, + triple, + mcpu, + size_t_bits, + target_features, + } = cli; + + if !(size_t_bits == 32 || size_t_bits == 64) { + println!("size_t_bits cannot be {size_t_bits}. Must be 32 or 64."); + return; + } Target::initialize_all(&InitializationConfig::default()); @@ -283,9 +298,9 @@ fn main() { } }; - let primitive: PrimitiveStore = TopLevelComposer::make_primitives(SIZE_T).0; + let primitive: PrimitiveStore = TopLevelComposer::make_primitives(size_t_bits).0; let (mut composer, builtins_def, builtins_ty) = - TopLevelComposer::new(vec![], ComposerConfig::default(), SIZE_T); + TopLevelComposer::new(vec![], ComposerConfig::default(), size_t_bits); let internal_resolver: Arc = ResolverInternal { id_to_type: builtins_ty.into(), @@ -405,7 +420,7 @@ fn main() { membuffer.lock().push(buffer); }))); let threads = (0..threads) - .map(|i| Box::new(DefaultCodeGenerator::new(format!("module{i}"), SIZE_T))) + .map(|i| Box::new(DefaultCodeGenerator::new(format!("module{i}"), size_t_bits))) .collect(); let (registry, handles) = WorkerRegistry::create_workers(threads, top_level, &llvm_options, &f); registry.add_task(task);