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RISC-V (32 bits): PMP support with 4k stack alignment #1

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sb10q merged 1 commits from occheung/libfringe:4k-align into master 2024-08-17 17:37:23 +08:00
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1 changed files with 10 additions and 0 deletions
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src/arch/riscv32.rs
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@ -159,6 +159,12 @@ pub unsafe fn swap(arg: usize, new_sp: StackPointer,
// Just pass a dummy pointer if we aren't linking the stack // Just pass a dummy pointer if we aren't linking the stack
&mut dummy &mut dummy
}; };
let stack_limit = if let Some(new_stack) = new_stack {
new_stack.limit() as *mut usize
} else {
// Stack should not reach all the way to address 0
0 as *mut usize
};
#[naked] #[naked]
unsafe extern "C" fn trampoline() { unsafe extern "C" fn trampoline() {
@ -174,6 +180,9 @@ pub unsafe fn swap(arg: usize, new_sp: StackPointer,
.cfi_offset fp, 4 .cfi_offset fp, 4
.cfi_offset ra, 0 .cfi_offset ra, 0
# Perform environment call to modify the PMP regions
ecall
# Link the call stacks together by writing the current stack bottom # Link the call stacks together by writing the current stack bottom
# address to the CFA slot in the new stack. # address to the CFA slot in the new stack.
sw sp, 0(a3) sw sp, 0(a3)
@ -209,6 +218,7 @@ pub unsafe fn swap(arg: usize, new_sp: StackPointer,
"{a0}" (arg) "{a0}" (arg)
"{a2}" (new_sp.0) "{a2}" (new_sp.0)
"{a3}" (new_cfa) "{a3}" (new_cfa)
"{a7}" (stack_limit)
:/*"zero",*/"ra",/*"sp","gp","tp",*/"t0","t1","t2", :/*"zero",*/"ra",/*"sp","gp","tp",*/"t0","t1","t2",
/*"fp",*/"s1",/*"a0", "a1"*/"a2", "a3", "a4", "a5", /*"fp",*/"s1",/*"a0", "a1"*/"a2", "a3", "a4", "a5",
"a6", "a7", "s2", "s3", "s4", "s5", "s6", "s7", "a6", "a7", "s2", "s3", "s4", "s5", "s6", "s7",