boot: Correct PCLK1, PCLK2 freq value
- PCLK is divided from HCLK in power of two - abs max pclk1 = 42MHz - abs max pclk2 = 84MHz
This commit is contained in:
parent
a2bb390ae2
commit
86a9fb039e
|
@ -38,8 +38,8 @@ pub fn bootup(
|
||||||
.use_hse(MegaHertz::from_raw(8).convert())
|
.use_hse(MegaHertz::from_raw(8).convert())
|
||||||
.sysclk(MegaHertz::from_raw(168).convert())
|
.sysclk(MegaHertz::from_raw(168).convert())
|
||||||
.hclk(MegaHertz::from_raw(168).convert())
|
.hclk(MegaHertz::from_raw(168).convert())
|
||||||
.pclk1(MegaHertz::from_raw(32).convert())
|
.pclk1(MegaHertz::from_raw(42).convert())
|
||||||
.pclk2(MegaHertz::from_raw(64).convert())
|
.pclk2(MegaHertz::from_raw(84).convert())
|
||||||
.freeze();
|
.freeze();
|
||||||
|
|
||||||
sys_timer::setup(core_perif.SYST, clocks);
|
sys_timer::setup(core_perif.SYST, clocks);
|
||||||
|
|
Loading…
Reference in New Issue