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boot: Correct PCLK1, PCLK2 freq value

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- PCLK is divided from HCLK in power of two
- abs max pclk1 = 42MHz
- abs max pclk2 = 84MHz
This commit is contained in:
linuswck 2024-02-26 16:40:10 +08:00
parent a2bb390ae2
commit 86a9fb039e
1 changed files with 2 additions and 2 deletions
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4
src/device/boot.rs
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@ -38,8 +38,8 @@ pub fn bootup(
.use_hse(MegaHertz::from_raw(8).convert())
.sysclk(MegaHertz::from_raw(168).convert())
.hclk(MegaHertz::from_raw(168).convert())
.pclk1(MegaHertz::from_raw(32).convert())
.pclk2(MegaHertz::from_raw(64).convert())
.pclk1(MegaHertz::from_raw(42).convert())
.pclk2(MegaHertz::from_raw(84).convert())
.freeze();
sys_timer::setup(core_perif.SYST, clocks);