From 6b05b2d85134e65e500249a023c0765fdba0cad2 Mon Sep 17 00:00:00 2001
From: linuswck <linuswck@m-labs.hk>
Date: Wed, 7 Feb 2024 12:46:13 +0800
Subject: [PATCH] Fix Power Up Hw Issue - See Issue #32 on Kirdy Hw Repo

---
 src/device/boot.rs   |  2 +-
 src/device/gpio.rs   | 18 +++++++++++++++---
 src/device/hw_rev.rs | 35 +++++++++++++++++++++++++++++++++++
 src/device/mod.rs    |  1 +
 4 files changed, 52 insertions(+), 4 deletions(-)
 create mode 100644 src/device/hw_rev.rs

diff --git a/src/device/boot.rs b/src/device/boot.rs
index 91af272..2eb1d29 100644
--- a/src/device/boot.rs
+++ b/src/device/boot.rs
@@ -50,7 +50,7 @@ pub fn bootup(
         perif.GPIOB,
         perif.GPIOC,
         perif.GPIOD,
-        perif.GPIOG,
+        perif.GPIOE,
         perif.SPI1,
         perif.SPI2,
         perif.SPI3,
diff --git a/src/device/gpio.rs b/src/device/gpio.rs
index ba3bb1c..dcdcc2f 100644
--- a/src/device/gpio.rs
+++ b/src/device/gpio.rs
@@ -5,12 +5,13 @@ use crate::thermostat::ad5680;
 use crate::thermostat::max1968::{self, MAX1968PinSet, MAX1968Phy, PWM_FREQ_KHZ};
 use crate::thermostat::ad7172;
 use crate::net::net::EthernetMgmtPins;
+use crate::device::hw_rev::{HWRev, HwRevPins};
 use stm32_eth::EthPins;
 use stm32f4xx_hal::{
     gpio::{gpioa::*, gpiob::*, gpioc::*, GpioExt, Input, Speed},
     otg_fs::USB,
     pac::{
-        GPIOA, GPIOB, GPIOC, GPIOD, GPIOG, OTG_FS_DEVICE, OTG_FS_GLOBAL, OTG_FS_PWRCLK, SPI1, SPI2, SPI3,
+        GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, OTG_FS_DEVICE, OTG_FS_GLOBAL, OTG_FS_PWRCLK, SPI1, SPI2, SPI3,
         TIM4,
     },
     rcc::Clocks,
@@ -28,7 +29,7 @@ pub fn setup(
     gpiob: GPIOB,
     gpioc: GPIOC,
     gpiod: GPIOD,
-    gpiog: GPIOG,
+    gpioe: GPIOE,
     spi1: SPI1,
     spi2: SPI2,
     spi3: SPI3,
@@ -48,7 +49,18 @@ pub fn setup(
     let gpiob = gpiob.split();
     let gpioc = gpioc.split();
     let gpiod = gpiod.split();
-    let gpiog = gpiog.split();
+    let gpioe = gpioe.split();
+
+    let mut hw_rev = HWRev::detect_hw_rev(
+        HwRevPins {
+            h0: gpioe.pe8.into_input(),
+            h1: gpioe.pe9.into_input(),
+            h2: gpioe.pe10.into_input(),
+            h3: gpioe.pe11.into_input(),
+        }
+    );
+
+    hw_rev.startup_delay_before_gpio_init();
 
     let usb = USB {
         usb_global: otg_fs_global,
diff --git a/src/device/hw_rev.rs b/src/device/hw_rev.rs
new file mode 100644
index 0000000..c0771fd
--- /dev/null
+++ b/src/device/hw_rev.rs
@@ -0,0 +1,35 @@
+use stm32f4xx_hal::gpio::{Input, Output, PushPull, PE10, PE11, PE8, PE9};
+use crate::device::sys_timer::sleep;
+pub struct HwRevPins{
+    pub h0: PE8<Input>,
+    pub h1: PE9<Input>,
+    pub h2: PE10<Input>,
+    pub h3: PE11<Input>,
+}
+
+pub struct HWRev {
+    pub major: u8,
+    pub minor: u8,
+}
+
+impl HWRev {
+    pub fn detect_hw_rev(hwrev_pins: HwRevPins) -> Self {
+        let (h0, h1, h2, h3) = (
+            hwrev_pins.h0.is_high(), hwrev_pins.h1.is_high(),
+            hwrev_pins.h2.is_high(), hwrev_pins.h3.is_high()
+        );
+        match (h0, h1, h2, h3) {
+            (true, true, true, true) => HWRev { major: 0, minor: 3 },
+            (_, _, _, _) => HWRev { major: 0, minor: 0 }
+        }
+    }
+
+    /// On Rev0_3, during power up, digital power rails are stabilized way before analog power rails
+    ///     This causes improper initialization on any peripherals requiring calibrations 
+    ///     See Issue #32 on Kirdy Hw Repo
+    pub fn startup_delay_before_gpio_init(&mut self){
+        if self.major == 0 && self.minor == 3 {
+            sleep(1500);
+        }
+    }
+}
\ No newline at end of file
diff --git a/src/device/mod.rs b/src/device/mod.rs
index b037c9a..6255ad6 100644
--- a/src/device/mod.rs
+++ b/src/device/mod.rs
@@ -5,3 +5,4 @@ pub mod rtt_logger;
 pub mod sys_timer;
 pub mod usb;
 pub mod flash_store;
+pub mod hw_rev;