From b07cd315727dba282490c992ea47e6f000881b43 Mon Sep 17 00:00:00 2001
From: whitequark <whitequark@whitequark.org>
Date: Mon, 8 May 2017 13:28:25 +0000
Subject: [PATCH] Raise ADC clock to 32 MHz (maximum).

---
 firmware/src/main.rs | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/firmware/src/main.rs b/firmware/src/main.rs
index d197db6..0890c19 100644
--- a/firmware/src/main.rs
+++ b/firmware/src/main.rs
@@ -237,7 +237,8 @@ fn main() {
 
         let adc0 = tm4c129x::ADC0.borrow(cs);
         // Due to silicon erratum, this HAS to use PLL. PIOSC is not a suitable source.
-        adc0.cc.write(|w| w.cs().syspll().clkdiv().bits(16));
+        // fADC=32 MHz
+        adc0.cc.write(|w| w.cs().syspll().clkdiv().bits(10));
         adc0.im.write(|w| w.mask0().bit(true));
         adc0.emux.write(|w| w.em0().timer());
         adc0.ssmux0.write(|w| {