board: bring up gpio port b
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8b20118198
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9c0f560367
@ -34,9 +34,10 @@ pub fn init() {
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// Switch to PLL (sysclk=120MHz)
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// Switch to PLL (sysclk=120MHz)
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sysctl.rsclkcfg.write(|w| unsafe { w.bits(0b1_0_0_1_0011_0000_0000000000_0000000011) });
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sysctl.rsclkcfg.write(|w| unsafe { w.bits(0b1_0_0_1_0011_0000_0000000000_0000000011) });
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// Bring up GPIO ports A, D, E, F, G, K, L, M, P, Q
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// Bring up GPIO ports A, B, D, E, F, G, K, L, M, P, Q
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sysctl.rcgcgpio.modify(|_, w| {
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sysctl.rcgcgpio.modify(|_, w| {
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w.r0().bit(true)
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w.r0().bit(true)
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.r1().bit(true)
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.r3().bit(true)
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.r3().bit(true)
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.r4().bit(true)
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.r4().bit(true)
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.r5().bit(true)
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.r5().bit(true)
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