update dependencies
This commit is contained in:
parent
1da96a2a4d
commit
98b17fc574
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@ -2,12 +2,22 @@
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name = "ionpak-firmware"
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version = "0.1.0"
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dependencies = [
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"cortex-m 0.2.5 (registry+https://github.com/rust-lang/crates.io-index)",
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"cortex-m-rt 0.2.1 (registry+https://github.com/rust-lang/crates.io-index)",
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"smoltcp 0.4.0-pre (git+https://github.com/m-labs/smoltcp?rev=6bc6cc7)",
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"tm4c129x 0.4.0 (git+https://github.com/m-labs/dslite2svd)",
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"cortex-m 0.3.1 (registry+https://github.com/rust-lang/crates.io-index)",
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"cortex-m-rt 0.3.5 (registry+https://github.com/rust-lang/crates.io-index)",
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"smoltcp 0.4.0-pre (git+https://github.com/m-labs/smoltcp?rev=d03ea64)",
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"tm4c129x 0.5.0 (git+https://github.com/m-labs/dslite2svd?rev=d527f3f)",
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]
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[[package]]
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name = "aligned"
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version = "0.1.1"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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[[package]]
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name = "bare-metal"
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version = "0.1.0"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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[[package]]
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name = "byteorder"
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version = "1.1.0"
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@ -15,26 +25,23 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
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[[package]]
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name = "cortex-m"
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version = "0.2.5"
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version = "0.3.1"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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dependencies = [
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"cortex-m-semihosting 0.1.3 (registry+https://github.com/rust-lang/crates.io-index)",
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"aligned 0.1.1 (registry+https://github.com/rust-lang/crates.io-index)",
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"bare-metal 0.1.0 (registry+https://github.com/rust-lang/crates.io-index)",
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"volatile-register 0.2.0 (registry+https://github.com/rust-lang/crates.io-index)",
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]
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[[package]]
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name = "cortex-m-rt"
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version = "0.2.1"
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version = "0.3.5"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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dependencies = [
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"r0 0.2.1 (registry+https://github.com/rust-lang/crates.io-index)",
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"cortex-m 0.3.1 (registry+https://github.com/rust-lang/crates.io-index)",
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"r0 0.2.2 (registry+https://github.com/rust-lang/crates.io-index)",
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]
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[[package]]
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name = "cortex-m-semihosting"
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version = "0.1.3"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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[[package]]
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name = "managed"
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version = "0.3.0"
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@ -42,13 +49,13 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
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[[package]]
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name = "r0"
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version = "0.2.1"
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version = "0.2.2"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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[[package]]
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name = "smoltcp"
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version = "0.4.0-pre"
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source = "git+https://github.com/m-labs/smoltcp?rev=6bc6cc7#6bc6cc7af7ab7b710e9238b3c34bd50425ed7a92"
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source = "git+https://github.com/m-labs/smoltcp?rev=d03ea64#d03ea6426b0524af726bfc4eb6fa025af475622f"
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dependencies = [
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"byteorder 1.1.0 (registry+https://github.com/rust-lang/crates.io-index)",
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"managed 0.3.0 (registry+https://github.com/rust-lang/crates.io-index)",
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@ -56,10 +63,12 @@ dependencies = [
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[[package]]
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name = "tm4c129x"
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version = "0.4.0"
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source = "git+https://github.com/m-labs/dslite2svd#43d3964bb9dcebe631b0bdf1c2fdc975cf53c41c"
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version = "0.5.0"
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source = "git+https://github.com/m-labs/dslite2svd?rev=d527f3f#d527f3febb73eb63db94ff84a580a4ea71d3a23b"
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dependencies = [
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"cortex-m 0.2.5 (registry+https://github.com/rust-lang/crates.io-index)",
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"bare-metal 0.1.0 (registry+https://github.com/rust-lang/crates.io-index)",
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"cortex-m 0.3.1 (registry+https://github.com/rust-lang/crates.io-index)",
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"cortex-m-rt 0.3.5 (registry+https://github.com/rust-lang/crates.io-index)",
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"vcell 0.1.0 (registry+https://github.com/rust-lang/crates.io-index)",
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]
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@ -77,13 +86,14 @@ dependencies = [
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]
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[metadata]
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"checksum aligned 0.1.1 (registry+https://github.com/rust-lang/crates.io-index)" = "d1a92995cea48691c7c93e12597cca4d692bb3130d0a291c7141b9793c7829e7"
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"checksum bare-metal 0.1.0 (registry+https://github.com/rust-lang/crates.io-index)" = "19de0ac42f6977d7428858b750131ea9c8166f4ccb7deeab38b6a8656c9798b0"
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"checksum byteorder 1.1.0 (registry+https://github.com/rust-lang/crates.io-index)" = "ff81738b726f5d099632ceaffe7fb65b90212e8dce59d518729e7e8634032d3d"
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"checksum cortex-m 0.2.5 (registry+https://github.com/rust-lang/crates.io-index)" = "56f002db38ab2c7a829bc0b997db8c5f47ada08f88a248c729d4f73c555628db"
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"checksum cortex-m-rt 0.2.1 (registry+https://github.com/rust-lang/crates.io-index)" = "0db3cf185ad88e3d70e9b7738d1bad23f86322130d376df9b80a64df7abdb4cb"
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"checksum cortex-m-semihosting 0.1.3 (registry+https://github.com/rust-lang/crates.io-index)" = "54a88e8fd577808637f819107f34eece1b6b45be8db1c56d1c563095b80b655e"
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"checksum cortex-m 0.3.1 (registry+https://github.com/rust-lang/crates.io-index)" = "4d553ca1f23403c81e6d3d28a64ef6e8eadd7f395195aacda65cbc0dc987738e"
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"checksum cortex-m-rt 0.3.5 (registry+https://github.com/rust-lang/crates.io-index)" = "ec28308ef272803380c9c4e6708bf1d794ddcc8c9d511b9976b31ac3322452e5"
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"checksum managed 0.3.0 (registry+https://github.com/rust-lang/crates.io-index)" = "61eb783b4fa77e8fa4d27ec400f97ed9168546b8b30341a120b7ba9cc6571aaf"
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"checksum r0 0.2.1 (registry+https://github.com/rust-lang/crates.io-index)" = "6e7bbed8cd0a245bbf3759ebb35c964822b7a8c15ceeeee56d4cc5f060ce518e"
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"checksum smoltcp 0.4.0-pre (git+https://github.com/m-labs/smoltcp?rev=6bc6cc7)" = "<none>"
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"checksum tm4c129x 0.4.0 (git+https://github.com/m-labs/dslite2svd)" = "<none>"
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"checksum r0 0.2.2 (registry+https://github.com/rust-lang/crates.io-index)" = "e2a38df5b15c8d5c7e8654189744d8e396bddc18ad48041a500ce52d6948941f"
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"checksum smoltcp 0.4.0-pre (git+https://github.com/m-labs/smoltcp?rev=d03ea64)" = "<none>"
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"checksum tm4c129x 0.5.0 (git+https://github.com/m-labs/dslite2svd?rev=d527f3f)" = "<none>"
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"checksum vcell 0.1.0 (registry+https://github.com/rust-lang/crates.io-index)" = "45c297f0afb6928cd08ab1ff9d95e99392595ea25ae1b5ecf822ff8764e57a0d"
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"checksum volatile-register 0.2.0 (registry+https://github.com/rust-lang/crates.io-index)" = "0d67cb4616d99b940db1d6bd28844ff97108b498a6ca850e5b6191a532063286"
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@ -4,13 +4,17 @@ version = "0.1.0"
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authors = ["whitequark <whitequark@whitequark.org>"]
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[dependencies]
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cortex-m = "0.2.5"
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cortex-m-rt = { version = "0.2.0", features = ["linker-script"], default-features = false }
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tm4c129x = { git = "https://github.com/m-labs/dslite2svd" }
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cortex-m = "0.3.1"
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cortex-m-rt = { version = "0.3.5", features = ["abort-on-panic"] }
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[dependencies.tm4c129x]
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git = "https://github.com/m-labs/dslite2svd"
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rev = "d527f3f"
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features = ["rt"]
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[dependencies.smoltcp]
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git = "https://github.com/m-labs/smoltcp"
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rev = "6bc6cc7"
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rev = "d03ea64"
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features = []
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default-features = false
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@ -3,15 +3,13 @@
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extern crate cortex_m;
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extern crate cortex_m_rt;
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#[macro_use(interrupt)]
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extern crate tm4c129x;
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extern crate smoltcp;
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use core::cell::{Cell, RefCell};
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use core::fmt;
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use cortex_m::exception::Handlers as ExceptionHandlers;
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use cortex_m::interrupt::Mutex;
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use tm4c129x::interrupt::Interrupt;
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use tm4c129x::interrupt::Handlers as InterruptHandlers;
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use smoltcp::Error;
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use smoltcp::wire::{EthernetAddress, IpAddress};
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use smoltcp::iface::{ArpCache, SliceArpCache, EthernetInterface};
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@ -97,31 +95,11 @@ macro_rules! create_socket {
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}
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fn main() {
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// Enable the FPU
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unsafe {
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asm!("
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PUSH {R0, R1}
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LDR.W R0, =0xE000ED88
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LDR R1, [R0]
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ORR R1, R1, #(0xF << 20)
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STR R1, [R0]
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DSB
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ISB
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POP {R0, R1}
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");
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}
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// Beware of the compiler inserting FPU instructions
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// in the prologue of functions before the FPU is enabled!
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main_with_fpu();
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}
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#[inline(never)]
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fn main_with_fpu() {
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board::init();
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cortex_m::interrupt::free(|cs| {
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let nvic = tm4c129x::NVIC.borrow(cs);
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nvic.enable(Interrupt::ADC0SS0);
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nvic.enable(tm4c129x::Interrupt::ADC0SS0);
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let mut loop_anode = LOOP_ANODE.borrow(cs).borrow_mut();
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let mut loop_cathode = LOOP_CATHODE.borrow(cs).borrow_mut();
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@ -298,8 +276,8 @@ fn main_with_fpu() {
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}
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}
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use tm4c129x::interrupt::ADC0SS0;
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extern fn adc0_ss0(_ctxt: ADC0SS0) {
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interrupt!(ADC0SS0, adc0_ss0);
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fn adc0_ss0() {
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cortex_m::interrupt::free(|cs| {
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let adc0 = tm4c129x::ADC0.borrow(cs);
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if adc0.ostat.read().ov0().bit() {
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@ -325,16 +303,3 @@ extern fn adc0_ss0(_ctxt: ADC0SS0) {
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adc_irq_count.set(adc_irq_count.get() + 1);
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});
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}
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#[used]
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#[link_section = ".rodata.exceptions"]
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pub static EXCEPTIONS: ExceptionHandlers = ExceptionHandlers {
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..cortex_m::exception::DEFAULT_HANDLERS
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};
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#[used]
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#[link_section = ".rodata.interrupts"]
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pub static INTERRUPTS: InterruptHandlers = InterruptHandlers {
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ADC0SS0: adc0_ss0,
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..tm4c129x::interrupt::DEFAULT_HANDLERS
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};
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