From 89104a551c55553120ca00c391e653f96a752ff6 Mon Sep 17 00:00:00 2001 From: whitequark Date: Tue, 28 Aug 2018 19:57:17 +0000 Subject: [PATCH] Update for latest nightly. --- firmware/.cargo/config | 3 +- firmware/Cargo.lock | 199 ++++++++--------------------------- firmware/Cargo.toml | 11 +- firmware/Xargo.toml | 6 -- firmware/build.rs | 1 - firmware/src/board.rs | 90 +++++++--------- firmware/src/eeprom.rs | 34 +++--- firmware/src/ethmac.rs | 34 +++--- firmware/src/loop_anode.rs | 2 +- firmware/src/loop_cathode.rs | 2 +- firmware/src/main.rs | 27 ++--- 11 files changed, 138 insertions(+), 271 deletions(-) delete mode 100644 firmware/Xargo.toml diff --git a/firmware/.cargo/config b/firmware/.cargo/config index 06b340b..f907e49 100644 --- a/firmware/.cargo/config +++ b/firmware/.cargo/config @@ -1,8 +1,7 @@ [target.thumbv7em-none-eabihf] +runner = "arm-none-eabi-gdb" rustflags = [ "-C", "link-arg=-Tlink.x", - "-C", "linker=arm-none-eabi-ld", - "-Z", "linker-flavor=ld", ] [build] diff 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"https://github.com/rust-lang-nursery/compiler-builtins" -stage = 1 diff --git a/firmware/build.rs b/firmware/build.rs index 7e55d6c..5a44256 100644 --- a/firmware/build.rs +++ b/firmware/build.rs @@ -56,7 +56,6 @@ fn linker_script() { .unwrap(); println!("cargo:rustc-link-search={}", out.display()); - println!("cargo:rerun-if-changed=build.rs"); println!("cargo:rerun-if-changed=memory.x"); } diff --git a/firmware/src/board.rs b/firmware/src/board.rs index 065bad6..19207fb 100644 --- a/firmware/src/board.rs +++ b/firmware/src/board.rs @@ -48,8 +48,8 @@ pub const FBI_R225: f32 = 22000.0; pub fn set_led(state: bool) { - cortex_m::interrupt::free(|cs| { - let gpio_k = tm4c129x::GPIO_PORTK.borrow(cs); + cortex_m::interrupt::free(|_cs| { + let gpio_k = unsafe { &*tm4c129x::GPIO_PORTK::ptr() }; if state { gpio_k.data.modify(|r, w| w.data().bits(r.data().bits() | LED2)) } else { @@ -59,30 +59,30 @@ pub fn set_led(state: bool) { } pub fn get_button() -> bool { - let gpio_dat = cortex_m::interrupt::free(|cs| { - let gpio_l = tm4c129x::GPIO_PORTL.borrow(cs); + let gpio_dat = cortex_m::interrupt::free(|_cs| { + let gpio_l = unsafe { &*tm4c129x::GPIO_PORTL::ptr() }; gpio_l.data.read().bits() as u8 }); gpio_dat & BTNN == 0 } pub fn set_hv_pwm(duty: u16) { - cortex_m::interrupt::free(|cs| { - let pwm0 = tm4c129x::PWM0.borrow(cs); + cortex_m::interrupt::free(|_cs| { + let pwm0 = unsafe { &*tm4c129x::PWM0::ptr() }; pwm0._0_cmpa.write(|w| w.compa().bits(duty)); }); } pub fn set_fv_pwm(duty: u16) { - cortex_m::interrupt::free(|cs| { - let pwm0 = tm4c129x::PWM0.borrow(cs); + cortex_m::interrupt::free(|_cs| { + let pwm0 = unsafe { &*tm4c129x::PWM0::ptr() }; pwm0._1_cmpa.write(|w| w.compa().bits(duty)); }); } pub fn set_fbv_pwm(duty: u16) { - cortex_m::interrupt::free(|cs| { - let pwm0 = tm4c129x::PWM0.borrow(cs); + cortex_m::interrupt::free(|_cs| { + let pwm0 = unsafe { &*tm4c129x::PWM0::ptr() }; pwm0._2_cmpa.write(|w| w.compa().bits(duty)); }); } @@ -95,8 +95,8 @@ pub enum EmissionRange { } pub fn set_emission_range(range: EmissionRange) { - cortex_m::interrupt::free(|cs| { - let gpio_p = tm4c129x::GPIO_PORTP.borrow(cs); + cortex_m::interrupt::free(|_cs| { + let gpio_p = unsafe { &*tm4c129x::GPIO_PORTP::ptr() }; gpio_p.data.modify(|r, w| { let value = r.data().bits() & 0b100111; match range { @@ -116,8 +116,8 @@ pub enum ElectrometerRange { } pub fn set_electrometer_range(range: ElectrometerRange) { - cortex_m::interrupt::free(|cs| { - let gpio_p = tm4c129x::GPIO_PORTP.borrow(cs); + cortex_m::interrupt::free(|_cs| { + let gpio_p = unsafe { &*tm4c129x::GPIO_PORTP::ptr() }; gpio_p.data.modify(|r, w| { let value = r.data().bits() & 0b111100; match range { @@ -130,23 +130,23 @@ pub fn set_electrometer_range(range: ElectrometerRange) { } pub fn reset_error() { - cortex_m::interrupt::free(|cs| { - let gpio_q = tm4c129x::GPIO_PORTQ.borrow(cs); + cortex_m::interrupt::free(|_cs| { + let gpio_q = unsafe { &*tm4c129x::GPIO_PORTQ::ptr() }; gpio_q.data.modify(|r, w| w.data().bits(r.data().bits() & !ERR_RESN)); gpio_q.data.modify(|r, w| w.data().bits(r.data().bits() | ERR_RESN)); }); } pub fn error_latched() -> bool { - cortex_m::interrupt::free(|cs| { - let gpio_l = tm4c129x::GPIO_PORTL.borrow(cs); + cortex_m::interrupt::free(|_cs| { + let gpio_l = unsafe { &*tm4c129x::GPIO_PORTL::ptr() }; gpio_l.data.read().bits() as u8 & ERR_LATCHN == 0 }) } pub fn process_errors() { - let gpio_dat = cortex_m::interrupt::free(|cs| { - let gpio_l = tm4c129x::GPIO_PORTL.borrow(cs); + let gpio_dat = cortex_m::interrupt::free(|_cs| { + let gpio_l = unsafe { &*tm4c129x::GPIO_PORTL::ptr() }; gpio_l.data.read().bits() as u8 }); if gpio_dat & FV_ERRN == 0 { @@ -167,8 +167,8 @@ pub fn process_errors() { } pub fn init() { - cortex_m::interrupt::free(|cs| { - let sysctl = tm4c129x::SYSCTL.borrow(cs); + cortex_m::interrupt::free(|_cs| { + let sysctl = unsafe { &*tm4c129x::SYSCTL::ptr() }; // Set up main oscillator sysctl.moscctl.write(|w| w.noxtal().bit(false)); @@ -210,7 +210,7 @@ pub fn init() { while !sysctl.prgpio.read().r14().bit() {} // Set up UART0 - let gpio_a = tm4c129x::GPIO_PORTA_AHB.borrow(cs); + let gpio_a = unsafe { &*tm4c129x::GPIO_PORTA_AHB::ptr() }; gpio_a.dir.write(|w| w.dir().bits(0b11)); gpio_a.den.write(|w| w.den().bits(0b11)); gpio_a.afsel.write(|w| w.afsel().bits(0b11)); @@ -219,7 +219,7 @@ pub fn init() { sysctl.rcgcuart.modify(|_, w| w.r0().bit(true)); while !sysctl.pruart.read().r0().bit() {} - let uart_0 = tm4c129x::UART0.borrow(cs); + let uart_0 = unsafe { &*tm4c129x::UART0::ptr() }; uart_0.cc.write(|w| w.cs().sysclk()); uart_0.ibrd.write(|w| w.divint().bits((UART_DIV / 64) as u16)); uart_0.fbrd.write(|w| w.divfrac().bits((UART_DIV % 64) as u8)); @@ -227,7 +227,7 @@ pub fn init() { uart_0.ctl.write(|w| w.rxe().bit(true).txe().bit(true).uarten().bit(true)); // Set up LEDs - let gpio_k = tm4c129x::GPIO_PORTK.borrow(cs); + let gpio_k = unsafe { &*tm4c129x::GPIO_PORTK::ptr() }; gpio_k.dir.write(|w| w.dir().bits(LED1|LED2)); gpio_k.den.write(|w| w.den().bits(LED1|LED2)); // Switch LED1 to LAN mode @@ -235,15 +235,15 @@ pub fn init() { gpio_k.pctl.modify(|_, w| unsafe { w.pmc4().bits(5) }); // EN0LED0 // Set up gain and emission range control pins - let gpio_p = tm4c129x::GPIO_PORTP.borrow(cs); + let gpio_p = unsafe { &*tm4c129x::GPIO_PORTP::ptr() }; gpio_p.dir.write(|w| w.dir().bits(0b111111)); gpio_p.den.write(|w| w.den().bits(0b111111)); set_emission_range(EmissionRange::Med); set_electrometer_range(ElectrometerRange::Med); // Set up error and pushbutton pins - let gpio_l = tm4c129x::GPIO_PORTL.borrow(cs); - let gpio_q = tm4c129x::GPIO_PORTQ.borrow(cs); + let gpio_l = unsafe { &*tm4c129x::GPIO_PORTL::ptr() }; + let gpio_q = unsafe { &*tm4c129x::GPIO_PORTQ::ptr() }; gpio_l.pur.write(|w| w.pue().bits(FV_ERRN|FBV_ERRN|FBI_ERRN|AV_ERRN|AI_ERRN|BTNN)); gpio_l.den.write(|w| w.den().bits(FV_ERRN|FBV_ERRN|FBI_ERRN|AV_ERRN|AI_ERRN|ERR_LATCHN|BTNN)); gpio_q.dir.write(|w| w.dir().bits(ERR_RESN)); @@ -251,13 +251,13 @@ pub fn init() { reset_error(); // error latch is an undefined state upon power-up; reset it // Set up PWMs - let gpio_f = tm4c129x::GPIO_PORTF_AHB.borrow(cs); + let gpio_f = unsafe { &*tm4c129x::GPIO_PORTF_AHB::ptr() }; gpio_f.dir.write(|w| w.dir().bits(HV_PWM|FV_PWM)); gpio_f.den.write(|w| w.den().bits(HV_PWM|FV_PWM)); gpio_f.afsel.write(|w| w.afsel().bits(HV_PWM|FV_PWM)); gpio_f.pctl.write(|w| unsafe { w.pmc0().bits(6).pmc2().bits(6) }); - let gpio_g = tm4c129x::GPIO_PORTG_AHB.borrow(cs); + let gpio_g = unsafe { &*tm4c129x::GPIO_PORTG_AHB::ptr() }; gpio_g.dir.write(|w| w.dir().bits(FBV_PWM)); gpio_g.den.write(|w| w.den().bits(FBV_PWM)); gpio_g.afsel.write(|w| w.afsel().bits(FBV_PWM)); @@ -266,7 +266,7 @@ pub fn init() { sysctl.rcgcpwm.modify(|_, w| w.r0().bit(true)); while !sysctl.prpwm.read().r0().bit() {} - let pwm0 = tm4c129x::PWM0.borrow(cs); + let pwm0 = unsafe { &*tm4c129x::PWM0::ptr() }; // HV_PWM pwm0._0_gena.write(|w| w.actload().zero().actcmpad().one()); pwm0._0_load.write(|w| w.load().bits(PWM_LOAD)); @@ -292,11 +292,11 @@ pub fn init() { } pub fn start_adc() { - cortex_m::interrupt::free(|cs| { - let sysctl = tm4c129x::SYSCTL.borrow(cs); + cortex_m::interrupt::free(|_cs| { + let sysctl = unsafe { &*tm4c129x::SYSCTL::ptr() }; - let gpio_d = tm4c129x::GPIO_PORTD_AHB.borrow(cs); - let gpio_e = tm4c129x::GPIO_PORTE_AHB.borrow(cs); + let gpio_d = unsafe { &*tm4c129x::GPIO_PORTD_AHB::ptr() }; + let gpio_e = unsafe { &*tm4c129x::GPIO_PORTE_AHB::ptr() }; gpio_d.afsel.write(|w| w.afsel().bits(FBV_ADC|AV_ADC)); gpio_d.amsel.write(|w| w.amsel().bits(FBV_ADC|AV_ADC)); gpio_e.afsel.write(|w| w.afsel().bits(FD_ADC|FV_ADC|FBI_ADC|IC_ADC)); @@ -305,7 +305,7 @@ pub fn start_adc() { sysctl.rcgcadc.modify(|_, w| w.r0().bit(true)); while !sysctl.pradc.read().r0().bit() {} - let adc0 = tm4c129x::ADC0.borrow(cs); + let adc0 = unsafe { &*tm4c129x::ADC0::ptr() }; // VCO 480 / 15 = 32MHz ADC clock adc0.cc.write(|w| w.cs().syspll().clkdiv().bits(15-1)); adc0.im.write(|w| w.mask0().bit(true)); @@ -331,27 +331,17 @@ pub fn start_adc() { adc0.ctl.write(|w| w.vref().bit(true)); adc0.actss.write(|w| w.asen0().bit(true)); - let nvic = tm4c129x::NVIC.borrow(cs); - nvic.enable(tm4c129x::Interrupt::ADC0SS0); + let mut cp = unsafe { tm4c129x::CorePeripherals::steal() }; + cp.NVIC.enable(tm4c129x::Interrupt::ADC0SS0); }); } pub fn get_mac_address() -> [u8; 6] { - let (userreg0, userreg1) = cortex_m::interrupt::free(|cs| { - let flashctl = tm4c129x::FLASH_CTRL.borrow(cs); + let (userreg0, userreg1) = cortex_m::interrupt::free(|_cs| { + let flashctl = unsafe { &*tm4c129x::FLASH_CTRL::ptr() }; (flashctl.userreg0.read().bits(), flashctl.userreg1.read().bits()) }); [userreg0 as u8, (userreg0 >> 8) as u8, (userreg0 >> 16) as u8, userreg1 as u8, (userreg1 >> 8) as u8, (userreg1 >> 16) as u8] } - -pub fn delay(d: u32) { - for _ in 0..d { - unsafe { - asm!(" - NOP - "); - } - } -} diff --git a/firmware/src/eeprom.rs b/firmware/src/eeprom.rs index ea9ac26..16c679a 100644 --- a/firmware/src/eeprom.rs +++ b/firmware/src/eeprom.rs @@ -1,38 +1,36 @@ -use cortex_m; +use cortex_m::{self, asm::delay}; use tm4c129x; -use board; - pub const BLOCK_COUNT: u16 = 96; pub const BLOCK_LEN: usize = 64; fn wait_done() { - while cortex_m::interrupt::free(|cs| { - let eeprom = tm4c129x::EEPROM.borrow(cs); + while cortex_m::interrupt::free(|_cs| { + let eeprom = unsafe { &*tm4c129x::EEPROM::ptr() }; eeprom.eedone.read().working().bit() }) {}; } pub fn init() { - cortex_m::interrupt::free(|cs| { - let sysctl = tm4c129x::SYSCTL.borrow(cs); + cortex_m::interrupt::free(|_cs| { + let sysctl = unsafe { &*tm4c129x::SYSCTL::ptr() }; sysctl.rcgceeprom.modify(|_, w| w.r0().bit(true)); // Bring up EEPROM - board::delay(16); + delay(16); sysctl.sreeprom.modify(|_, w| w.r0().bit(true)); // Activate EEPROM reset - board::delay(16); + delay(16); sysctl.sreeprom.modify(|_, w| w.r0().bit(false)); // Dectivate EEPROM reset - board::delay(16); + delay(16); while !sysctl.preeprom.read().r0().bit() {} // Wait for the EEPROM to come out of reset - board::delay(16); + delay(16); }); wait_done(); } pub fn read_block(buffer: &mut [u8; BLOCK_LEN], block: u16) { assert!(block < BLOCK_COUNT); - cortex_m::interrupt::free(|cs| { - let eeprom = tm4c129x::EEPROM.borrow(cs); + cortex_m::interrupt::free(|_cs| { + let eeprom = unsafe { &*tm4c129x::EEPROM::ptr() }; eeprom.eeblock.write(|w| unsafe { w.block().bits(block) }); eeprom.eeoffset.write(|w| unsafe { w.offset().bits(0) }); for i in 0..BLOCK_LEN/4 { @@ -47,19 +45,19 @@ pub fn read_block(buffer: &mut [u8; BLOCK_LEN], block: u16) { pub fn write_block(buffer: &[u8; BLOCK_LEN], block: u16) { assert!(block < BLOCK_COUNT); - cortex_m::interrupt::free(|cs| { - let eeprom = tm4c129x::EEPROM.borrow(cs); + cortex_m::interrupt::free(|_cs| { + let eeprom = unsafe { &*tm4c129x::EEPROM::ptr() }; eeprom.eeblock.write(|w| unsafe { w.block().bits(block) }); eeprom.eeoffset.write(|w| unsafe { w.offset().bits(0) }); }); for i in 0..BLOCK_LEN/4 { let word = buffer[4*i] as u32 | (buffer[4*i+1] as u32) << 8 | (buffer[4*i+2] as u32) << 16 | (buffer[4*i+3] as u32) << 24; - cortex_m::interrupt::free(|cs| { - let eeprom = tm4c129x::EEPROM.borrow(cs); + cortex_m::interrupt::free(|_cs| { + let eeprom = unsafe { &*tm4c129x::EEPROM::ptr() }; eeprom.eerdwrinc.write(|w| unsafe { w.bits(word) }); }); - board::delay(16); + delay(16); wait_done(); } } diff --git a/firmware/src/ethmac.rs b/firmware/src/ethmac.rs index 659ace9..757f0d2 100644 --- a/firmware/src/ethmac.rs +++ b/firmware/src/ethmac.rs @@ -1,13 +1,11 @@ use core::{slice, cmp}; -use cortex_m; +use cortex_m::{self, asm::delay}; use tm4c129x; use smoltcp::Result; use smoltcp::time::Instant; use smoltcp::wire::EthernetAddress; use smoltcp::phy; -use board; - const EPHY_BMCR: u8 = 0x00; // Ethernet PHY Basic Mode Control #[allow(dead_code)] const EPHY_BMSR: u8 = 0x01; // Ethernet PHY Basic Mode Status @@ -43,8 +41,8 @@ const ETH_RX_BUFFER_COUNT: usize = 3; const ETH_RX_BUFFER_SIZE: usize = 1536; fn phy_read(reg_addr: u8) -> u16 { - cortex_m::interrupt::free(|cs| { - let emac0 = tm4c129x::EMAC0.borrow(cs); + cortex_m::interrupt::free(|_cs| { + let emac0 = unsafe { &*tm4c129x::EMAC0::ptr() }; // Make sure the MII is idle while emac0.miiaddr.read().miib().bit() {}; @@ -66,8 +64,8 @@ fn phy_read(reg_addr: u8) -> u16 { } fn phy_write(reg_addr: u8, reg_data: u16) { - cortex_m::interrupt::free(|cs| { - let emac0 = tm4c129x::EMAC0.borrow(cs); + cortex_m::interrupt::free(|_cs| { + let emac0 = unsafe { &*tm4c129x::EMAC0::ptr() }; // Make sure the MII is idle while emac0.miiaddr.read().miib().bit() {}; @@ -236,8 +234,8 @@ impl TxRing { self.desc_buf[self.cur_desc + 0] = EMAC_TDES0_OWN | EMAC_TDES0_LS | EMAC_TDES0_FS | EMAC_TDES0_TCH; - cortex_m::interrupt::free(|cs| { - let emac0 = tm4c129x::EMAC0.borrow(cs); + cortex_m::interrupt::free(|_cs| { + let emac0 = unsafe { &*tm4c129x::EMAC0::ptr() }; // Clear TU flag to resume processing emac0.dmaris.write(|w| w.tu().bit(true)); // Instruct the DMA to poll the transmit descriptor list @@ -270,27 +268,27 @@ impl Device { self.rx.init(); self.tx.init(); - cortex_m::interrupt::free(|cs| { - let sysctl = tm4c129x::SYSCTL.borrow(cs); - let emac0 = tm4c129x::EMAC0.borrow(cs); + cortex_m::interrupt::free(|_cs| { + let sysctl = &*tm4c129x::SYSCTL::ptr(); + let emac0 = &*tm4c129x::EMAC0::ptr(); sysctl.rcgcemac.modify(|_, w| w.r0().bit(true)); // Bring up MAC sysctl.sremac.modify(|_, w| w.r0().bit(true)); // Activate MAC reset - board::delay(16); + delay(16); sysctl.sremac.modify(|_, w| w.r0().bit(false)); // Dectivate MAC reset sysctl.rcgcephy.modify(|_, w| w.r0().bit(true)); // Bring up PHY sysctl.srephy.modify(|_, w| w.r0().bit(true)); // Activate PHY reset - board::delay(16); + delay(16); sysctl.srephy.modify(|_, w| w.r0().bit(false)); // Dectivate PHY reset while !sysctl.premac.read().r0().bit() {} // Wait for the MAC to come out of reset while !sysctl.prephy.read().r0().bit() {} // Wait for the PHY to come out of reset - board::delay(10000); + delay(10000); emac0.dmabusmod.modify(|_, w| w.swr().bit(true)); // Reset MAC DMA while emac0.dmabusmod.read().swr().bit() {} // Wait for the MAC DMA to come out of reset - board::delay(1000); + delay(1000); emac0.miiaddr.write(|w| w.cr()._100_150()); // Set the MII CSR clock speed. @@ -371,10 +369,10 @@ impl Device { emac0.flowctl.write(|w| w.bits(0)); // Disable flow control ??? - emac0.txdladdr.write(|w| unsafe { + emac0.txdladdr.write(|w| /*unsafe*/ { w.bits((&mut self.tx.desc_buf[0] as *mut u32) as u32) }); - emac0.rxdladdr.write(|w| unsafe { + emac0.rxdladdr.write(|w| /*unsafe*/ { w.bits((&mut self.rx.desc_buf[0] as *mut u32) as u32) }); diff --git a/firmware/src/loop_anode.rs b/firmware/src/loop_anode.rs index 45702c7..e4ae76b 100644 --- a/firmware/src/loop_anode.rs +++ b/firmware/src/loop_anode.rs @@ -1,4 +1,4 @@ -use core::num::Float; +use libm::F32Ext; use board; use pid; diff --git a/firmware/src/loop_cathode.rs b/firmware/src/loop_cathode.rs index 9e56221..37421ed 100644 --- a/firmware/src/loop_cathode.rs +++ b/firmware/src/loop_cathode.rs @@ -1,4 +1,4 @@ -use core::num::Float; +use libm::F32Ext; use board; use pid; diff --git a/firmware/src/main.rs b/firmware/src/main.rs index 6a007cf..6fc6d26 100644 --- a/firmware/src/main.rs +++ b/firmware/src/main.rs @@ -1,7 +1,10 @@ -#![feature(used, const_fn, core_float, asm, lang_items, conservative_impl_trait)] +#![feature(const_fn, panic_handler)] #![no_std] +#![no_main] +extern crate libm; extern crate cortex_m; +#[macro_use] extern crate cortex_m_rt; #[macro_use(interrupt)] extern crate tm4c129x; @@ -30,10 +33,10 @@ macro_rules! println { ($fmt:expr, $($arg:tt)*) => (print!(concat!($fmt, "\n"), $($arg)*)); } -#[lang = "panic_fmt"] -#[no_mangle] -pub extern fn rust_begin_panic(msg: fmt::Arguments, file: &'static str, line: u32, col: u32) -> ! { - println!("panic at {}:{}:{}: {}", file, line, col, msg); +#[no_mangle] // https://github.com/rust-lang/rust/issues/{38281,51647} +#[panic_handler] +pub fn panic_fmt(info: &core::panic::PanicInfo) -> ! { + println!("{}", info); loop {} } @@ -72,12 +75,10 @@ pub struct UART0; impl fmt::Write for UART0 { fn write_str(&mut self, s: &str) -> Result<(), fmt::Error> { + let uart_0 = unsafe { &*tm4c129x::UART0::ptr() }; for c in s.bytes() { - unsafe { - let uart_0 = tm4c129x::UART0.get(); - while (*uart_0).fr.read().txff().bit() {} - (*uart_0).dr.write(|w| w.data().bits(c)) - } + while uart_0.fr.read().txff().bit() {} + uart_0.dr.write(|w| w.data().bits(c)) } Ok(()) } @@ -103,7 +104,9 @@ macro_rules! create_socket { ) } -fn main() { +entry!(main); + +fn main() -> ! { board::init(); let button_pressed = board::get_button(); @@ -283,7 +286,7 @@ fn main() { interrupt!(ADC0SS0, adc0_ss0); fn adc0_ss0() { cortex_m::interrupt::free(|cs| { - let adc0 = tm4c129x::ADC0.borrow(cs); + let adc0 = unsafe { &*tm4c129x::ADC0::ptr() }; if adc0.ostat.read().ov0().bit() { panic!("ADC FIFO overflowed") }