Implement ADC readout.
This commit is contained in:
parent
87e97c4894
commit
5a011ea410
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@ -4,7 +4,7 @@ version = "0.1.0"
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dependencies = [
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"cortex-m 0.2.4 (registry+https://github.com/rust-lang/crates.io-index)",
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"cortex-m-rt 0.2.0 (registry+https://github.com/rust-lang/crates.io-index)",
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"tm4c129x 0.3.0 (git+https://github.com/m-labs/dslite2svd)",
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"tm4c129x 0.4.0 (git+https://github.com/m-labs/dslite2svd)",
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]
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[[package]]
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@ -42,8 +42,8 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
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[[package]]
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name = "tm4c129x"
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version = "0.3.0"
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source = "git+https://github.com/m-labs/dslite2svd#f01cff2384123e24b1a8e2d1f81141a1a8bafad9"
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version = "0.4.0"
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source = "git+https://github.com/m-labs/dslite2svd#7539765c94fa1643fab8a316e1eeef03d243b8fa"
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dependencies = [
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"cortex-m 0.2.4 (registry+https://github.com/rust-lang/crates.io-index)",
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"vcell 0.1.0 (registry+https://github.com/rust-lang/crates.io-index)",
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@ -68,6 +68,6 @@ dependencies = [
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"checksum cortex-m-rt 0.2.0 (registry+https://github.com/rust-lang/crates.io-index)" = "2ed494cbd15190fae60f608e6b4690e753df47b5f5e25e95d3c298f801f5c1d0"
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"checksum cortex-m-semihosting 0.1.3 (registry+https://github.com/rust-lang/crates.io-index)" = "54a88e8fd577808637f819107f34eece1b6b45be8db1c56d1c563095b80b655e"
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"checksum r0 0.2.1 (registry+https://github.com/rust-lang/crates.io-index)" = "6e7bbed8cd0a245bbf3759ebb35c964822b7a8c15ceeeee56d4cc5f060ce518e"
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"checksum tm4c129x 0.3.0 (git+https://github.com/m-labs/dslite2svd)" = "<none>"
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"checksum tm4c129x 0.4.0 (git+https://github.com/m-labs/dslite2svd)" = "<none>"
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"checksum vcell 0.1.0 (registry+https://github.com/rust-lang/crates.io-index)" = "45c297f0afb6928cd08ab1ff9d95e99392595ea25ae1b5ecf822ff8764e57a0d"
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"checksum volatile-register 0.2.0 (registry+https://github.com/rust-lang/crates.io-index)" = "0d67cb4616d99b940db1d6bd28844ff97108b498a6ca850e5b6191a532063286"
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@ -9,15 +9,23 @@ extern crate tm4c129x;
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use core::cell::Cell;
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use cortex_m::ctxt::Local;
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use cortex_m::exception::Handlers as ExceptionHandlers;
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use tm4c129x::interrupt::Interrupt;
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use tm4c129x::interrupt::Handlers as InterruptHandlers;
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const LED1: u8 = 0x10;
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const LED2: u8 = 0x40;
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const HV_PWM: u8 = 0x01;
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const FV_PWM: u8 = 0x04;
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const FBV_PWM: u8 = 0x01;
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const LED1: u8 = 0x10; //PF1
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const LED2: u8 = 0x40; //PF3
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const HV_PWM: u8 = 0x01; //PF0
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const FV_PWM: u8 = 0x04; //PF2
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const FBV_PWM: u8 = 0x01; //PD5
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const FD_ADC: u8 = 0x01; //PE0
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const FV_ADC: u8 = 0x02; //PE1
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const FBI_ADC: u8 = 0x04; //PE2
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const IC_ADC: u8 = 0x08; //PE3
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const FBV_ADC: u8 = 0x20; //PD5
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const AV_ADC: u8 = 0x40; //PD6
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const PWM_LOAD: u16 = (/*pwmclk*/16_000_000u32 / /*freq*/100_000) as u16;
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const ADC_TIMER_LOAD: u32 = /*timerclk*/16_000_000 / /*freq*/100;
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fn set_led(nr: u8, state: bool) {
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cortex_m::interrupt::free(|cs| {
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@ -51,6 +59,7 @@ fn set_fbv_pwm(duty: u16) {
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});
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}
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#[allow(dead_code)]
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enum EmissionRange {
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Low, // 22K
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Med, // 22K//(200Ω + compensated diode)
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@ -76,6 +85,7 @@ fn main() {
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cortex_m::interrupt::free(|cs| {
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let sysctl = tm4c129x::SYSCTL.borrow(cs);
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let nvic = tm4c129x::NVIC.borrow(cs);
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// Set up system timer
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let systick = tm4c129x::SYST.borrow(cs);
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@ -83,13 +93,17 @@ fn main() {
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systick.enable_counter();
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systick.enable_interrupt();
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// Bring up GPIO ports F, G, K, P
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// Bring up GPIO ports D, E, F, G, K, P
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sysctl.rcgcgpio.modify(|_, w| {
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w.r5().bit(true)
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w.r3().bit(true)
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.r4().bit(true)
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.r5().bit(true)
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.r6().bit(true)
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.r9().bit(true)
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.r13().bit(true)
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});
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while !sysctl.prgpio.read().r3().bit() {}
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while !sysctl.prgpio.read().r4().bit() {}
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while !sysctl.prgpio.read().r5().bit() {}
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while !sysctl.prgpio.read().r6().bit() {}
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while !sysctl.prgpio.read().r9().bit() {}
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@ -144,6 +158,53 @@ fn main() {
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.pwm4en().bit(true)
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});
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// Set up ADC
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let gpio_d = tm4c129x::GPIO_PORTD_AHB.borrow(cs);
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let gpio_e = tm4c129x::GPIO_PORTE_AHB.borrow(cs);
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gpio_d.amsel.write(|w| w.amsel().bits(FBV_ADC|AV_ADC));
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gpio_e.amsel.write(|w| w.amsel().bits(FD_ADC|FV_ADC|FBI_ADC|IC_ADC));
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sysctl.rcgcadc.modify(|_, w| w.r0().bit(true));
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while !sysctl.pradc.read().r0().bit() {}
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let adc0 = tm4c129x::ADC0.borrow(cs);
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adc0.actss.write(|w| w.asen0().bit(true));
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adc0.im.write(|w| w.mask0().bit(true));
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adc0.emux.write(|w| w.em0().timer());
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adc0.sac.write(|w| w.avg()._64x());
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adc0.ctl.write(|w| w.vref().bit(true));
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adc0.ssmux0.write(|w| {
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w.mux0().bits(0) //IC_ADC
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.mux1().bits(1) //FBI_ADC
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.mux2().bits(2) //FV_ADC
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.mux3().bits(3) //FD_ADC
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.mux4().bits(5) //AV_ADC
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.mux5().bits(6) //FBV_ADC
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});
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adc0.ssctl0.write(|w| w.end5().bit(true));
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adc0.sstsh0.write(|w| {
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w.tsh0()._256()
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.tsh1()._256()
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.tsh2()._256()
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.tsh3()._256()
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.tsh4()._256()
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.tsh5()._256()
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});
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nvic.enable(Interrupt::ADC0SS0);
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// Set up ADC timer
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sysctl.rcgctimer.modify(|_, w| w.r0().bit(true));
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while !sysctl.prtimer.read().r0().bit() {}
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let timer0 = tm4c129x::TIMER0.borrow(cs);
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timer0.cfg.write(|w| w.cfg()._32_bit_timer());
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timer0.tamr.write(|w| w.tamr().period());
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timer0.tailr.write(|w| unsafe { w.bits(ADC_TIMER_LOAD) });
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timer0.adcev.write(|w| w.tatoadcen().bit(true));
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timer0.cc.write(|w| w.altclk().bit(true));
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timer0.ctl.write(|w| w.taen().bit(true));
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set_emission_range(EmissionRange::Med);
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set_hv_pwm(PWM_LOAD/64);
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set_fv_pwm(PWM_LOAD/16);
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@ -151,8 +212,8 @@ fn main() {
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});
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}
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use cortex_m::exception::SysTick;
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use cortex_m::exception::SysTick;
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extern fn sys_tick(ctxt: SysTick) {
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static ELAPSED: Local<Cell<u32>, SysTick> = Local::new(Cell::new(0));
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let elapsed = ELAPSED.borrow(&ctxt);
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@ -168,6 +229,23 @@ extern fn sys_tick(ctxt: SysTick) {
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}
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}
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use tm4c129x::interrupt::ADC0SS0;
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extern fn adc0_ss0(_ctxt: ADC0SS0) {
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cortex_m::interrupt::free(|cs| {
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let adc0 = tm4c129x::ADC0.borrow(cs);
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if adc0.ostat.read().ov0().bit() {
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panic!("ADC FIFO overflowed")
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}
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let _ic_sample = adc0.ssfifo0.read().data();
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let _fbi_sample = adc0.ssfifo0.read().data();
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let _fv_sample = adc0.ssfifo0.read().data();
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let _fd_sample = adc0.ssfifo0.read().data();
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let _av_sample = adc0.ssfifo0.read().data();
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let _fbv_sample = adc0.ssfifo0.read().data();
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})
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}
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#[used]
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#[link_section = ".rodata.exceptions"]
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pub static EXCEPTIONS: ExceptionHandlers = ExceptionHandlers {
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@ -178,5 +256,6 @@ pub static EXCEPTIONS: ExceptionHandlers = ExceptionHandlers {
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#[used]
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#[link_section = ".rodata.interrupts"]
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pub static INTERRUPTS: InterruptHandlers = InterruptHandlers {
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ADC0SS0: adc0_ss0,
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..tm4c129x::interrupt::DEFAULT_HANDLERS
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};
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