ad7172: doc, style
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@ -34,6 +34,9 @@ pub enum Register {
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Gain3 = 0x3B,
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Gain3 = 0x3B,
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}
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}
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/// AD7172-2 implementation
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///
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/// [Manual](https://www.analog.com/media/en/technical-documentation/data-sheets/AD7172-2.pdf)
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pub struct Adc<SPI: Transfer<u8>, NSS: OutputPin> {
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pub struct Adc<SPI: Transfer<u8>, NSS: OutputPin> {
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spi: SPI,
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spi: SPI,
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nss: NSS,
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nss: NSS,
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@ -56,16 +59,15 @@ impl<SPI: Transfer<u8>, NSS: OutputPin> Adc<SPI, NSS> {
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/// Returns the channel the data is from
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/// Returns the channel the data is from
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pub fn data_ready(&mut self) -> Option<u8> {
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pub fn data_ready(&mut self) -> Option<u8> {
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let mut buf = [0u8; 2];
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let mut buf = [0u8; 2];
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match self.read_reg(Register::Status, &mut buf) {
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self.read_reg(Register::Status, &mut buf)
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Err(_) => None,
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.ok()
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Ok(()) => {
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.and_then(|()| {
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if buf[1] & 0x80 == 0 {
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if buf[1] & 0x80 == 0 {
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None
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None
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} else {
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} else {
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Some(buf[1] & 0x3)
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Some(buf[1] & 0x3)
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}
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}
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}
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})
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}
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}
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}
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/// Get data
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/// Get data
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