68 lines
1.2 KiB
Rust
68 lines
1.2 KiB
Rust
#![no_std]
|
|
|
|
use stm32h7xx_hal::{
|
|
hal::{
|
|
digital::v2::{
|
|
InputPin,
|
|
OutputPin,
|
|
},
|
|
blocking::spi::Transfer,
|
|
},
|
|
pac,
|
|
prelude::*,
|
|
spi,
|
|
};
|
|
|
|
use cortex_m;
|
|
use cortex_m::asm::nop;
|
|
use cortex_m_semihosting::hprintln;
|
|
|
|
use nb::block;
|
|
|
|
/*
|
|
* Basic structure for CPLD signal multiplexing
|
|
*/
|
|
pub struct CPLD<SPI, CS0, CS1, CS2> {
|
|
spi: SPI,
|
|
chip_select: (CS0, CS1, CS2),
|
|
}
|
|
|
|
impl<SPI, CS0, CS1, CS2> CPLD<SPI, CS0, CS1, CS2> where
|
|
SPI: Transfer<u8>,
|
|
CS0: OutputPin,
|
|
CS1: OutputPin,
|
|
CS2: OutputPin,
|
|
{
|
|
|
|
// Constructor for CPLD
|
|
pub fn new(spi: SPI, chip_select: (CS0, CS1, CS2)) -> Self {
|
|
|
|
// Init CS to be 0
|
|
let mut obj = Self{spi, chip_select};
|
|
obj.select_chip(0);
|
|
return obj
|
|
}
|
|
|
|
// Select chip
|
|
pub fn select_chip(&mut self, channel: u8) {
|
|
match channel & (1 << 0) {
|
|
0 => self.chip_select.0.set_low(),
|
|
_ => self.chip_select.0.set_high(),
|
|
}.ok();
|
|
match channel & (1 << 1) {
|
|
0 => self.chip_select.1.set_low(),
|
|
_ => self.chip_select.1.set_high(),
|
|
}.ok();
|
|
match channel & (1 << 2) {
|
|
0 => self.chip_select.2.set_low(),
|
|
_ => self.chip_select.2.set_high(),
|
|
}.ok();
|
|
}
|
|
|
|
// Return the SPI and CS pins
|
|
pub fn release(self) -> (SPI, (CS0, CS1, CS2)) {
|
|
return (self.spi, self.chip_select);
|
|
}
|
|
|
|
}
|