93 lines
1.7 KiB
Rust
93 lines
1.7 KiB
Rust
#![no_main]
|
|
#![no_std]
|
|
|
|
use panic_semihosting as _;
|
|
|
|
use stm32h7xx_hal::hal::digital::v2::{
|
|
InputPin,
|
|
OutputPin,
|
|
};
|
|
use stm32h7xx_hal::{pac, prelude::*, spi};
|
|
|
|
use cortex_m;
|
|
use cortex_m::asm::nop;
|
|
use cortex_m_rt::entry;
|
|
use cortex_m_semihosting::hprintln;
|
|
|
|
use core::ptr;
|
|
use nb::block;
|
|
|
|
|
|
#[entry]
|
|
fn main() -> ! {
|
|
|
|
let cp = cortex_m::Peripherals::take().unwrap();
|
|
let dp = pac::Peripherals::take().unwrap();
|
|
|
|
let pwr = dp.PWR.constrain();
|
|
let vos = pwr.freeze();
|
|
|
|
let rcc = dp.RCC.constrain();
|
|
let ccdr = rcc
|
|
.sys_ck(400.mhz())
|
|
.pll1_q_ck(48.mhz())
|
|
.freeze(vos, &dp.SYSCFG);
|
|
|
|
let mut delay = cp.SYST.delay(ccdr.clocks);
|
|
|
|
let gpioa = dp.GPIOA.split(ccdr.peripheral.GPIOA);
|
|
let gpiob = dp.GPIOB.split(ccdr.peripheral.GPIOB);
|
|
let gpiod = dp.GPIOD.split(ccdr.peripheral.GPIOD);
|
|
let gpiof = dp.GPIOF.split(ccdr.peripheral.GPIOF);
|
|
|
|
// Setup CDONE for checking
|
|
let fpga_cdone = gpiod.pd15.into_pull_up_input();
|
|
|
|
match fpga_cdone.is_high() {
|
|
Ok(true) => hprintln!("FPGA is ready."),
|
|
Ok(_) => hprintln!("FPGA is in reset state."),
|
|
Err(_) => hprintln!("Error: Cannot read C_DONE"),
|
|
}.unwrap();
|
|
|
|
hprintln!("Start reading pin output...").unwrap();
|
|
delay.delay_ms(200_u16);
|
|
|
|
|
|
let pin = gpioa.pa0.into_pull_up_input();
|
|
let mut state = pin.is_high().unwrap();
|
|
|
|
hprintln!("Initial reading...");
|
|
|
|
match state {
|
|
true => hprintln!("High."),
|
|
false => hprintln!("Low."),
|
|
}.unwrap();
|
|
|
|
hprintln!("Polling...");
|
|
|
|
loop {
|
|
if pin.is_high().unwrap() != state {
|
|
match !state {
|
|
true => hprintln!("High."),
|
|
false => hprintln!("Low."),
|
|
}.unwrap();
|
|
state = !state;
|
|
}
|
|
|
|
if fpga_cdone.is_low().unwrap() {
|
|
hprintln!("FPGA is in reset state.");
|
|
}
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|