52 lines
1.1 KiB
Python
52 lines
1.1 KiB
Python
from humpback import HumpbackPlatform
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from migen.fhdl.module import Module
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class UrukulConnector(Module):
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def __init__(self, platform):
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# Request EEM I/O & SPI
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eem = platform.request("eem", 0)
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spi = platform.request("spi")
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led = platform.request("user_led")
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# Assert signal length
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assert len(eem.p) == 8
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assert len(eem.n) == 8
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assert len(spi.sclk) == 1
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assert len(spi.mosi) == 1
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assert len(spi.miso) == 1
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assert len(spi.cs) == 3
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# Flip positive signal as negative output, maybe only do it for FPGA outputs
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# self.comb += eem.n.eq(~eem.p)
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# Link EEM to SPI
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self.comb += [
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eem.p[0].eq(spi.sclk),
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eem.n[0].eq(~spi.sclk),
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eem.p[1].eq(spi.mosi),
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eem.n[1].eq(~spi.mosi),
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spi.miso.eq(eem.p[2]),
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eem.p[3].eq(spi.cs[0]),
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eem.n[3].eq(~spi.cs[0]),
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eem.p[4].eq(spi.cs[1]),
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eem.n[4].eq(~spi.cs[1]),
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eem.p[5].eq(spi.cs[2]),
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eem.n[5].eq(~spi.cs[2]),
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led.eq(1)
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]
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# Debug purposes: Tie EEM MISO to EEM MOSI
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# self.comb += eem.p[2].eq(eem.p[1])
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if __name__ == "__main__":
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platform = HumpbackPlatform()
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platform.build(UrukulConnector(platform))
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