# Import built in I/O, Connectors & Platform template
from migen.build.platforms.sinara.humpback import _io, _connectors, Platform

# Import migen platform for Lattice Products
from migen.build.lattice import LatticePlatform

# Import migen pin record structure
from migen.build.generic_platform import *

# Modify the SPI record, to include all 3 CS pins
'''
	sclk -> PA5 : C8
	mosi -> PB5 : N5
	miso -> PA6 : T2
	cs_0 -> PB12: B13
	cs_1 -> PA15: B14
	cs_2 -> PC7 : B15
'''

# Filter out SPI record
_io = [record for record in _io if record[0] != "spi"]

# Reinsert new SPI record, without MISO
_io.append(
	("spi", 0,
		Subsignal("cs"	, Pins("B13 B14 B15")),
		Subsignal("sclk", Pins("C8")),
		Subsignal("mosi", Pins("N5")),
		Subsignal("miso", Pins("T2")),
		IOStandard("LVCMOS33"),
	)
)

# Resource: DDS I/O_Update
'''
	io_update -> PB15 : A11
'''
_io.append(
	("io_update", 0, Pins("A11"), IOStandard("LVCMOS33"))
)

# Inherit Platform to gain the programmed clock attribute
class HumpbackPlatform(Platform):
	def __init__(self):
		LatticePlatform.__init__(self, "ice40-hx8k-ct256", _io, _connectors, toolchain="icestorm")

# Syntax check for direct execution
if __name__ == "__main__":
	platform = HumpbackPlatform()