#![no_main] #![no_std] #![feature(core_intrinsics)] #![feature(assoc_char_funcs)] #![feature(alloc_error_handler)] use log::{ trace, warn }; use stm32h7xx_hal::gpio::Speed; use stm32h7xx_hal::rng::Rng; use stm32h7xx_hal::{pac, prelude::*, spi}; use stm32h7xx_hal::ethernet; use smoltcp as net; use SaiTLS as tls; use minimq::{ MqttClient, QoS }; use cortex_m; use cortex_m_rt::entry; use alloc_cortex_m::CortexMHeap; use rtic::cyccnt::{Instant, U32Ext}; use rand_core::{RngCore, CryptoRng}; use tls::TlsRng; use tls::tls::TlsSocket; use tls::tcp_stack::NetworkStack; use heapless::{ String, consts, consts::* }; use core::alloc::Layout; #[macro_use] pub mod bitmask_macro; pub mod spi_slave; pub mod cpld; use crate::cpld::CPLD; pub mod config_register; pub mod attenuator; pub mod dds; pub mod net_store; use crate::net_store::NetStorage; pub mod fpga; use crate::fpga::flash_ice40_fpga; pub mod mqtt_mux; use crate::mqtt_mux::MqttMux; pub mod urukul; use crate::urukul::Urukul; pub mod flash; pub mod config; use crate::config::get_net_config; pub mod flash_store; use crate::flash_store::init_flash; mod logger; #[global_allocator] static ALLOCATOR: CortexMHeap = CortexMHeap::empty(); #[alloc_error_handler] fn oom(_: Layout) -> ! { warn!("Out of memory!"); loop {} } static mut NET_STORE: NetStorage = NetStorage { // Placeholder for the real IP address, which is initialized at runtime. ip_addrs: [net::wire::IpCidr::Ipv6( net::wire::Ipv6Cidr::SOLICITED_NODE_PREFIX, )], neighbor_cache: [None; 8], routes_cache: [None; 8], }; #[link_section = ".sram3.eth"] static mut DES_RING: ethernet::DesRing = ethernet::DesRing::new(); #[link_section = ".sram3.tx_store"] static mut TX_STORAGE: [u8; 8192] = [0; 8192]; #[link_section = ".sram3.rx_store"] static mut RX_STORAGE: [u8; 8192] = [0; 8192]; struct RngStruct { rng: Rng } impl RngCore for RngStruct { fn next_u32(&mut self) -> u32 { self.rng.gen().unwrap() } fn next_u64(&mut self) -> u64 { (u64::from(self.next_u32()) << 32) | u64::from(self.next_u32()) } fn fill_bytes(&mut self, dest: &mut [u8]) { self.rng.fill(dest).unwrap(); } fn try_fill_bytes(&mut self, dest: &mut [u8]) -> Result<(), rand_core::Error> { Ok(self.fill_bytes(dest)) } } impl CryptoRng for RngStruct {} impl TlsRng for RngStruct {} #[entry] fn main() -> ! { // Initialize the allocator BEFORE you use it let start = cortex_m_rt::heap_start() as usize; let size = 32768; // in bytes unsafe { ALLOCATOR.init(start, size) } let mut cp = cortex_m::Peripherals::take().unwrap(); let dp = pac::Peripherals::take().unwrap(); unsafe { logger::enable_itm(&dp.DBGMCU, &mut cp.DCB, &mut cp.ITM); } logger::init(); // Enable SRAM3 for the descriptor ring and smoltcp buffers. dp.RCC.ahb2enr.modify(|_, w| w.sram3en().set_bit()); // Enable SRAM2 for the RAM management buffer dp.RCC.ahb2enr.modify(|_, w| w.sram2en().set_bit()); let pwr = dp.PWR.constrain(); let vos = pwr.freeze(); let rcc = dp.RCC.constrain(); let ccdr = rcc .use_hse(8.mhz()) .sys_ck(400.mhz()) .hclk(200.mhz()) .pll1_q_ck(48.mhz()) .pll1_r_ck(400.mhz()) .freeze(vos, &dp.SYSCFG); let delay = cp.SYST.delay(ccdr.clocks); cp.SCB.invalidate_icache(); cp.SCB.enable_icache(); cp.DWT.enable_cycle_counter(); // Instantiate random number generator let mut rng = RngStruct { rng: dp.RNG.constrain(ccdr.peripheral.RNG, &ccdr.clocks) }; // Create sfkv store and flash storage manager let (flash, mut flash_store) = init_flash(dp.FLASH); // Acquire client/broker IP Address, client MAC address from flash memory let net_config = get_net_config(&mut flash_store); let gpioa = dp.GPIOA.split(ccdr.peripheral.GPIOA); let gpiob = dp.GPIOB.split(ccdr.peripheral.GPIOB); let gpioc = dp.GPIOC.split(ccdr.peripheral.GPIOC); let gpiod = dp.GPIOD.split(ccdr.peripheral.GPIOD); let _gpioe = dp.GPIOE.split(ccdr.peripheral.GPIOE); let gpiof = dp.GPIOF.split(ccdr.peripheral.GPIOF); let gpiog = dp.GPIOG.split(ccdr.peripheral.GPIOG); // Note: ITM doesn't work beyond this, due to a pin conflict between: // - FPGA_SPI: SCK (af5) // - ST_LINK SWO (af0) // Both demands PB3 trace!("Flashing configuration bitstream to iCE40 HX8K on Humpback."); // Using SPI_1 alternate functions (af5) let fpga_sck = gpiob.pb3.into_alternate_af5(); let fpga_sdo = gpiob.pb4.into_alternate_af5(); let fpga_sdi = gpiob.pb5.into_alternate_af5(); // Setup SPI_SS_B and CRESET_B let fpga_ss = gpioa.pa4.into_push_pull_output(); let fpga_creset = gpiof.pf3.into_open_drain_output(); // Setup CDONE let fpga_cdone = gpiod.pd15.into_pull_up_input(); // Setup SPI interface let fpga_cfg_spi = dp.SPI1.spi( (fpga_sck, fpga_sdo, fpga_sdi), spi::MODE_3, 12.mhz(), ccdr.peripheral.SPI1, &ccdr.clocks, ); flash_ice40_fpga(fpga_cfg_spi, fpga_ss, fpga_creset, fpga_cdone, delay).unwrap(); // Configure ethernet IO { let _rmii_refclk = gpioa.pa1.into_alternate_af11().set_speed(Speed::VeryHigh); let _rmii_mdio = gpioa.pa2.into_alternate_af11().set_speed(Speed::VeryHigh); let _rmii_mdc = gpioc.pc1.into_alternate_af11().set_speed(Speed::VeryHigh); let _rmii_crs_dv = gpioa.pa7.into_alternate_af11().set_speed(Speed::VeryHigh); let _rmii_rxd0 = gpioc.pc4.into_alternate_af11().set_speed(Speed::VeryHigh); let _rmii_rxd1 = gpioc.pc5.into_alternate_af11().set_speed(Speed::VeryHigh); let _rmii_tx_en = gpiog.pg11.into_alternate_af11().set_speed(Speed::VeryHigh); let _rmii_txd0 = gpiog.pg13.into_alternate_af11().set_speed(Speed::VeryHigh); let _rmii_txd1 = gpiob.pb13.into_alternate_af11().set_speed(Speed::VeryHigh); } // Configure ethernet // let mac_addr = net::wire::EthernetAddress([0xAC, 0x6F, 0x7A, 0xDE, 0xD6, 0xC8]); let (eth_dma, mut eth_mac) = unsafe { ethernet::new_unchecked( dp.ETHERNET_MAC, dp.ETHERNET_MTL, dp.ETHERNET_DMA, &mut DES_RING, net_config.eth_addr.clone(), ) }; unsafe { ethernet::enable_interrupt() } let store = unsafe { &mut NET_STORE }; store.ip_addrs[0] = net_config.ip_cidr; let neighbor_cache = net::iface::NeighborCache::new(&mut store.neighbor_cache[..]); let mut routes = net::iface::Routes::new(&mut store.routes_cache[..]); let default_v4_gw = net::wire::Ipv4Address::new(192, 168, 1, 1); routes.add_default_ipv4_route(default_v4_gw).unwrap(); let mut net_interface = net::iface::EthernetInterfaceBuilder::new(eth_dma) .ethernet_addr(net_config.eth_addr) .neighbor_cache(neighbor_cache) .ip_addrs(&mut store.ip_addrs[..]) .routes(routes) .finalize(); /* * Using SPI6 * SCLK -> PA5 (af8) * MOSI -> PG14 (af5) * MISO -> PA6 (af8) * CS -> 0: PB12, 1: PA15, 2: PC7 */ let sclk = gpioa.pa5.into_alternate_af8().set_speed(Speed::VeryHigh); let mosi = gpiog.pg14.into_alternate_af5().set_speed(Speed::VeryHigh); let miso = gpioa.pa6.into_alternate_af8().set_speed(Speed::VeryHigh); let (cs0, cs1, cs2) = ( gpiob.pb12.into_push_pull_output(), gpioa.pa15.into_push_pull_output(), gpioc.pc7.into_push_pull_output(), ); /* * I/O_Update -> PB15 */ let io_update = gpiob.pb15.into_push_pull_output(); let spi = dp.SPI6.spi( (sclk, miso, mosi), spi::MODE_0, 2.mhz(), ccdr.peripheral.SPI6, &ccdr.clocks, ); let switch = CPLD::new(spi, (cs0, cs1, cs2), io_update); let parts = switch.split(); let urukul = Urukul::new( parts.spi1, parts.spi2, parts.spi3, parts.spi4, parts.spi5, parts.spi6, parts.spi7 ); let mut mqtt_mux = MqttMux::new(urukul, flash, flash_store, net_config.name.as_str()); // Time unit in ms let mut time: u32 = 0; // Cycle counter for 1 ms // This effectively provides a conversion from rtic unit to ms let mut next_ms = Instant::now(); next_ms += 400_000.cycles(); let mut tls_socket_entries: [_; 1] = Default::default(); let mut tls_socket_set = tls::set::TlsSocketSet::new( &mut tls_socket_entries[..] ); let tx_buffer = net::socket::TcpSocketBuffer::new(unsafe { &mut TX_STORAGE[..] }); let rx_buffer = net::socket::TcpSocketBuffer::new(unsafe { &mut RX_STORAGE[..] }); let mut tcp_socket = net::socket::TcpSocket::new(rx_buffer, tx_buffer); tcp_socket.set_keep_alive( Some(net::time::Duration::from_secs(2)) ); let tls_socket = TlsSocket::new( tcp_socket, &mut rng, None ); let _ = tls_socket_set.add(tls_socket); let tls_stack = NetworkStack::new( tls_socket_set ); let mut client = MqttClient::::new( net_config.broker_ip, net_config.name.as_str(), tls_stack, ) .unwrap(); let mut tick = false; let mut has_subscribed = false; loop { // Update time accumulator in ms // Tick once every ms if Instant::now() > next_ms { tick = true; time += 1; next_ms += 400_000.cycles(); } // eth Poll if necessary // Do not poll if eth link is down while !eth_mac.phy_poll_link() {} client.network_stack.poll(&mut net_interface, net::time::Instant::from_millis(time)); // Process MQTT messages about Urukul/Control let connection = match client .poll(|_client, topic, message, _properties| { mqtt_mux.process_mqtt_ingress(topic, message); }) { Ok(_) => true, Err(e) => { log::info!("Warn: {:?}", e); false }, }; // Process MQTT response messages about Urukul for (topic, message) in mqtt_mux.process_mqtt_egress().unwrap() { client.publish( topic.as_str(), message.as_bytes(), QoS::AtMostOnce, &[] ).unwrap(); } if connection && !has_subscribed && tick { let mut str_builder: String = String::from(net_config.name.as_str()); str_builder.push_str("/Control/#").unwrap(); match client.subscribe(str_builder.as_str(), &[]) { Ok(()) => has_subscribed = true, Err(minimq::Error::NotReady) => {}, _e => {}, }; } // Reset tick flag tick = false; } }