use embedded_hal::blocking::spi::Transfer

/*
 * Bit Masks for CFG_Write
 */
const RF_SW			:u32	= 0x0000000F;
const LED			:u32	= 0x000000F0;
const PROFILE		:u32	= 0x00000700;
const IO_UPDATE		:u32	= 0x00001000;
const MASK_NU		:u32	= 0x0001E000;
const CLK_SEL0		:u32	= 0x00020000;
const SYNC_SEL		:u32	= 0x00040000;
const RST			:u32	= 0x00080000;
const IO_RST		:u32	= 0x00100000;
const CLK_SEL1		:u32	= 0x00200000;
const DIV			:u32	= 0x00C00000;

/*
 * Bit Masks for CFG_Read
 */
const SMP_ERR		:u32	= 0x000000F0;
const PLL_LOCK		:u32	= 0x00000F00;
const IFC_MODE		:u32	= 0x0000F000;
const PROTO_DEV		:u32	= 0x007F0000;

pub struct ConfigRegister<SPI> {
	spi: SPI,
	data: u32,
}