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2 Commits

Author SHA1 Message Date
occheung 8f4a97c97e cfg_reg: add getter function 2020-08-12 12:00:11 +08:00
occheung 0543e98956 cfg_reg: add setter function 2020-08-12 11:50:24 +08:00
3 changed files with 45 additions and 10 deletions

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@ -1,5 +1,5 @@
[target.thumbv7em-none-eabihf] [target.thumbv7em-none-eabihf]
runner = "gdb -q -x gdb_config/fpga_config.gdb" runner = "gdb -q -x gdb_config/debug.gdb"
rustflags = [ rustflags = [
"-C", "link-arg=-Tlink.x", "-C", "link-arg=-Tlink.x",
] ]

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@ -1,4 +1,5 @@
use embedded_hal::blocking::spi::Transfer; use embedded_hal::blocking::spi::Transfer;
use cortex_m_semihosting::hprintln;
use crate::Error; use crate::Error;
/* /*
@ -6,6 +7,7 @@ use crate::Error;
*/ */
macro_rules! construct_bitmask { macro_rules! construct_bitmask {
($collection: ident; $($name: ident, $shift: expr, $width: expr),+) => { ($collection: ident; $($name: ident, $shift: expr, $width: expr),+) => {
#[derive(Debug, Copy, Clone)]
pub enum $collection { pub enum $collection {
$( $(
$name, $name,
@ -33,7 +35,7 @@ macro_rules! construct_bitmask {
$collection::$name => { $collection::$name => {
let mut mask: u32 = 0; let mut mask: u32 = 0;
for bit in 0..$width { for bit in 0..$width {
mask != 1 << ($width + bit); mask |= (1 << ($shift + bit));
} }
mask mask
}, },
@ -80,17 +82,34 @@ where
} }
} }
pub fn set_configuration(&mut self, config: u32) -> Result<u32, Error<E>> { fn set_all_configurations(&mut self) -> Result<u32, Error<E>> {
self.data = config & 0x00FFFFFF;
match self.spi.transfer(&mut [ match self.spi.transfer(&mut [
((config & 0x00FF0000) >> 16) as u8, ((self.data & 0x00FF0000) >> 16) as u8,
((config & 0x0000FF00) >> 8) as u8, ((self.data & 0x0000FF00) >> 8) as u8,
((config & 0x000000FF) >> 0) as u8, ((self.data & 0x000000FF) >> 0) as u8,
]).map_err(Error::SPI) { ]).map_err(Error::SPI) {
Ok(arr) => Ok(((arr[0] as u32) << 16) | ((arr[1] as u32) << 8) | arr[2] as u32), Ok(arr) => Ok(self.data),
Err(e) => Err(e), Err(e) => Err(e),
} }
} }
pub fn set_configurations(&mut self, configs: &mut[(CFGMask, u32)]) -> Result<u32, Error<E>> {
for config in configs.into_iter() {
// Erase the bits in the configuration region
self.data &= (!config.0.get_bitmask());
// Check validity of config data
let shifted_config: u32 = config.1 << config.0.get_shift();
assert_eq!(shifted_config | config.0.get_bitmask(), config.0.get_bitmask());
// Write the configuration onto local data
self.data |= shifted_config;
}
// Write all configurations at the same time
self.set_all_configurations()
}
pub fn get_configuration(&mut self, config_type: CFGMask) -> u8 {
((self.data & config_type.get_bitmask()) >> config_type.get_shift()) as u8
}
} }
impl<SPI, E> Transfer<u8> for ConfigRegister<SPI> impl<SPI, E> Transfer<u8> for ConfigRegister<SPI>

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@ -21,7 +21,10 @@ use firmware;
use firmware::{ use firmware::{
CPLD, CPLD,
attenuator::Attenuator, attenuator::Attenuator,
config_register::ConfigRegister, config_register::{
ConfigRegister,
CFGMask,
},
}; };
#[entry] #[entry]
@ -92,7 +95,20 @@ fn main() -> ! {
attenuator.set_channel_attenuation(2, 15.3); attenuator.set_channel_attenuation(2, 15.3);
let mut config = ConfigRegister::new(parts.spi1); let mut config = ConfigRegister::new(parts.spi1);
hprintln!("{}", config.set_configuration(0xDEADBEEF).unwrap()).unwrap(); // Target configuration: 0x000FF1CE
hprintln!("{}", config.set_configurations(&mut [
(CFGMask::RF_SW, 0xE),
(CFGMask::LED, 0xC),
(CFGMask::PROFILE, 0x1),
(CFGMask::IO_UPDATE, 0x1),
(CFGMask::MASK_NU, 0xF),
(CFGMask::CLK_SEL0, 0x1),
(CFGMask::SYNC_SEL, 0x1),
(CFGMask::RST, 0x1),
(CFGMask::IO_RST, 0x0),
(CFGMask::CLK_SEL1, 0x0),
(CFGMask::DIV, 0x0),
]).unwrap()).unwrap();
loop { loop {
nop(); nop();