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c740386d6b ... 7665a23896

Author SHA1 Message Date
occheung 7665a23896 scpi: introduce master clock setup 2020-09-07 14:07:39 +08:00
occheung 60c8215059 hal: upgrade to 0.7.1 2020-09-07 14:05:13 +08:00
8 changed files with 226 additions and 153 deletions
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7
Cargo.toml
View File

@ -11,12 +11,13 @@ panic-halt = "0.2.0"
cortex-m = "0.6.2"
cortex-m-rt = "0.6.12"
embedded-hal = "0.2.4"
stm32h7xx-hal = {version = "0.6.0", features = [ "stm32h743v", "rt", "unproven" ] }
stm32h7-ethernet = { version = "0.2.0", features = [ "phy_lan8742a", "stm32h743v" ] }
smoltcp = { version = "0.6.0", default-features = false, features = [ "ethernet", "proto-ipv4", "proto-ipv6", "socket-raw" ] }
stm32h7xx-hal = {version = "0.7.1", features = [ "stm32h743v", "rt", "unproven", "ethernet", "phy_lan8742a" ] }
# stm32h7-ethernet = { version = "0.2.0", features = [ "phy_lan8742a", "stm32h743v" ] }
smoltcp = { version = "0.6.0", default-features = false, features = [ "ethernet", "proto-ipv4", "proto-ipv6", "socket-tcp" ] }
nb = "1.0.0"
# scpi = { path = "../scpi-fork/scpi", version = "0.3.4" }
scpi = { git = "https://github.com/occheung/scpi-rs", branch = "issue-4" }
mashup = "0.1.12"
lexical-core = { version="0.7.1", features=["radix"], default-features=false }
libm = "0.2.0"

65
examples/ethernet.rs
View File

@ -21,8 +21,9 @@ use cortex_m_semihosting::hprintln;
extern crate smoltcp;
// Ethernet crate for STM32H7 has been merged into HAL in the latest commit
extern crate stm32h7_ethernet as ethernet;
// extern crate stm32h7_ethernet as ethernet;
use stm32h7xx_hal::ethernet;
use stm32h7xx_hal::gpio::Speed;
use stm32h7xx_hal::hal::digital::v2::{
OutputPin,
@ -34,16 +35,6 @@ use Speed::*;
use libm::round;
/*
#[cfg(feature = "itm")]
use cortex_m_log::log::{trick_init, Logger};
#[cfg(feature = "itm")]
use cortex_m_log::{
destination::Itm, printer::itm::InterruptSync as InterruptSyncItm,
};
*/
use core::{
str,
fmt::Write
@ -76,7 +67,15 @@ use firmware::{
cpld::{
CPLD,
},
scpi::{ HelloWorldCommand, Channel1SwitchCommand},
scpi::{
HelloWorldCommand,
Channel0SwitchCommand,
Channel1SwitchCommand,
Channel2SwitchCommand,
Channel3SwitchCommand,
ClockSourceCommand,
ClockDivisionCommand,
},
Urukul,
scpi_root, recursive_scpi_tree
};
@ -246,7 +245,7 @@ fn main() -> ! {
let mac_addr = smoltcp::wire::EthernetAddress::from_bytes(&MAC_ADDRESS);
let (_eth_dma, mut eth_mac) = unsafe {
ethernet::ethernet_init(
ethernet::new_unchecked(
dp.ETHERNET_MAC,
dp.ETHERNET_MTL,
dp.ETHERNET_DMA,
@ -296,8 +295,27 @@ fn main() -> ! {
// SCPI configs
let tree = scpi_root!(
["EXAMple"] => {"HELLO" => {"WORLD" => HelloWorldCommand}};
"CHANNEL1" => {"SWitch" => Channel1SwitchCommand}
["EXAMple"] => {
"HELLO" => {
"WORLD" => HelloWorldCommand
}
},
"CHANNEL0" => {
"SWitch" => Channel0SwitchCommand
},
"CHANNEL1" => {
"SWitch" => Channel1SwitchCommand
},
"CHANNEL2" => {
"SWitch" => Channel2SwitchCommand
},
"CHANNEL3" => {
"SWitch" => Channel3SwitchCommand
},
"CLOCK" => {
"SOURCE" => ClockSourceCommand,
"DIVision" => ClockDivisionCommand
}
);
// Device was declared in prior
@ -351,23 +369,6 @@ fn main() -> ! {
},
};
// Float rounding test socket (:6969)
{
let mut socket = sockets.get::<TcpSocket>(tcp1_handle);
if !socket.is_open() {
socket.listen(6969).unwrap();
socket.set_timeout(Some(Duration::from_millis(5000)));
}
if socket.can_recv() {
let data = socket.recv(|buffer| {
(buffer.len(), buffer)
}).unwrap();
hprintln!("{:?}", data).unwrap();
let result = lexical_core::parse_partial::<f64>(data).unwrap();
writeln!(socket, "{}", round(result.0 * 2.0));
}
}
// SCPI interaction socket (:7000)
{
let mut socket = sockets.get::<TcpSocket>(silent_handle);

4
examples/mqtt_client.rs
View File

@ -2,7 +2,7 @@
#![no_main]
use smoltcp as net;
use stm32h7_ethernet as ethernet;
use stm32h7xx_hal::ethernet;
use stm32h7xx_hal::{gpio::Speed, prelude::*, spi, pac};
use embedded_hal::{blocking::spi::Transfer};
@ -103,7 +103,7 @@ fn main() -> ! {
// Configure ethernet
let mac_addr = net::wire::EthernetAddress([0xAC, 0x6F, 0x7A, 0xDE, 0xD6, 0xC8]);
let (eth_dma, _eth_mac) = unsafe {
ethernet::ethernet_init(
ethernet::new_unchecked(
dp.ETHERNET_MAC,
dp.ETHERNET_MTL,
dp.ETHERNET_DMA,

12
examples/tcp_client.rs
View File

@ -16,9 +16,7 @@ use cortex_m_semihosting::hprintln;
extern crate smoltcp;
// Ethernet crate for STM32H7 has been merged into HAL in the latest commit
extern crate stm32h7_ethernet as ethernet;
use stm32h7xx_hal::ethernet;
use stm32h7xx_hal::gpio::Speed;
use stm32h7xx_hal::hal::digital::v2::{
OutputPin,
@ -207,7 +205,7 @@ fn main() -> ! {
let mac_addr = smoltcp::wire::EthernetAddress::from_bytes(&MAC_ADDRESS);
let (_eth_dma, mut eth_mac) = unsafe {
ethernet::ethernet_init(
ethernet::new_unchecked(
dp.ETHERNET_MAC,
dp.ETHERNET_MTL,
dp.ETHERNET_DMA,
@ -321,13 +319,13 @@ fn main() -> ! {
{
let mut socket = socket_set.get::<TcpSocket>(client_handle);
if !socket.is_open() || !socket.can_send() {
if !socket.is_open() {
socket.abort();
socket.close();
// hprintln!("reset state: {}", socket.state()).unwrap();
hprintln!("reset state: {}", socket.state()).unwrap();
socket.connect((IpAddress::v4(192, 168, 1, 200), 1883),
(IpAddress::Unspecified, 45000)).unwrap();
// hprintln!("post connect state: {}", socket.state()).unwrap();
hprintln!("post connect state: {}", socket.state()).unwrap();
}
// hprintln!("client state: {}", socket.state()).unwrap();

17
memory.x
View File

@ -1,8 +1,7 @@
MEMORY
{
/* FLASH and RAM are mandatory memory regions */
FLASH : ORIGIN = 0x08000000, LENGTH = 1024K
FLASH1 : ORIGIN = 0x08100000, LENGTH = 1024K
FLASH : ORIGIN = 0x08000000, LENGTH = 2M
RAM : ORIGIN = 0x20000000, LENGTH = 128K
/* AXISRAM */
@ -11,7 +10,7 @@ MEMORY
/* SRAM */
SRAM1 : ORIGIN = 0x30000000, LENGTH = 128K
SRAM2 : ORIGIN = 0x30020000, LENGTH = 128K
SRAM3 : ORIGIN = 0x30040000, LENGTH = 32K
SRAM3 (rwx) : ORIGIN = 0x30040000, LENGTH = 32K
SRAM4 : ORIGIN = 0x38000000, LENGTH = 64K
/* Backup SRAM */
@ -31,22 +30,10 @@ _stack_start = ORIGIN(RAM) + LENGTH(RAM);
/* _stext = ORIGIN(FLASH) + 0x40c; */
SECTIONS {
.itcm : ALIGN(8) {
*(.itcm .itcm.*);
. = ALIGN(8);
} > ITCM
.axisram : ALIGN(8) {
*(.axisram .axisram.*);
. = ALIGN(8);
} > AXISRAM
.sram1 (NOLOAD) : ALIGN(4) {
*(.sram1 .sram1.*);
. = ALIGN(4);
} > SRAM1
.sram2 (NOLOAD) : ALIGN(4) {
*(.sram2 .sram2.*);
. = ALIGN(4);
} > SRAM2
.sram3 (NOLOAD) : ALIGN(4) {
*(.sram3 .sram3.*);
. = ALIGN(4);

116
src/lib.rs
View File

@ -12,6 +12,9 @@ use core::{
use cortex_m;
use cortex_m_semihosting::hprintln;
#[macro_use]
extern crate mashup;
#[macro_use]
pub mod bitmask_macro;
@ -56,6 +59,12 @@ pub enum Error<E> {
ParameterError,
}
pub enum ClockSource {
OSC,
SMA,
MMCX,
}
/*
* Struct for Urukul master device
*/
@ -145,6 +154,8 @@ pub trait UrukulTraits {
type Error;
fn get_channel_switch_status(&mut self, channel: u32) -> Result<bool, Self::Error>;
fn set_channel_switch(&mut self, channel: u32, status: bool) -> Result<(), Self::Error>;
fn set_clock_source(&mut self, source: ClockSource) -> Result<(), Self::Error>;
fn set_clock_division(&mut self, division: u8) -> Result<(), Self::Error>;
}
impl<SPI, E> UrukulTraits for Urukul<SPI>
@ -185,71 +196,42 @@ where
}
}
// fn switch_on(&mut self, channel: u32) -> Result<(), Self::Error>{
// if channel < 16 {
// let switch_set = channel | u32::from(self.config_register.get_status(StatusMask::RF_SW)?);
fn set_clock_source(&mut self, source: ClockSource) -> Result<(), Self::Error> {
let result = match source {
ClockSource::OSC => self.config_register.set_configurations(&mut [
(CFGMask::CLK_SEL0, 0),
(CFGMask::CLK_SEL1, 0),
]),
ClockSource::MMCX => self.config_register.set_configurations(&mut [
(CFGMask::CLK_SEL0, 0),
(CFGMask::CLK_SEL1, 1),
]),
ClockSource::SMA => self.config_register.set_configurations(&mut [
(CFGMask::CLK_SEL0, 1),
]),
};
match result {
Ok(_) => Ok(()),
Err(_e) => Err(_e),
}
}
// match self.config_register.set_configurations(&mut [
// (CFGMask::RF_SW, switch_set),
// ]) {
// Ok(_) => Ok(()),
// Err(_e) => Err(_e),
// }
// } else {
// Err(Error::ParameterError)
// }
// }
}
// /*
// * Struct for a better Urukul master device
// */
// pub struct BetterUrukul<'a, SPI, CS0, CS1, CS2, GPIO> {
// cpld: CPLD<SPI, CS0, CS1, CS2, GPIO>,
// parts: Option<Parts<'a, CPLD<SPI, CS0, CS1, CS2, GPIO>, SPI, CS0, CS1, CS2, GPIO>>,
// config_register: Option<ConfigRegister<SPISlave<'a, CPLD<SPI, CS0, CS1, CS2, GPIO>, SPI, CS0, CS1, CS2, GPIO>>>,
// attenuator: Option<Attenuator<SPISlave<'a, CPLD<SPI, CS0, CS1, CS2, GPIO>, SPI, CS0, CS1, CS2, GPIO>>>,
// dds: [Option<DDS<SPISlave<'a, CPLD<SPI, CS0, CS1, CS2, GPIO>, SPI, CS0, CS1, CS2, GPIO>>>; 4],
// }
// impl<'a, SPI, CS0, CS1, CS2, GPIO> BetterUrukul<'a, SPI, CS0, CS1, CS2, GPIO>
// where
// SPI: Transfer<u8>,
// CS0: OutputPin,
// CS1: OutputPin,
// CS2: OutputPin,
// GPIO: OutputPin,
// {
// pub fn new(spi: SPI, chip_select: (CS0, CS1, CS2), io_update: GPIO) -> Self {
// // let switch = CPLD::new(spi, chip_select, io_update);
// // let parts = switch.split();
// // Construct Urukul
// BetterUrukul {
// cpld: CPLD::new(spi, chip_select, io_update),
// // parts: CPLD::new(spi, chip_select, io_update).split(),
// // config_register: ConfigRegister::new(self.parts.spi1),
// // attenuator: Attenuator::new(self.parts.spi2),
// // dds: [
// // DDS::new(self.parts.spi4, f_ref_clks[1]),
// // DDS::new(self.parts.spi5, f_ref_clks[1]),
// // DDS::new(self.parts.spi6, f_ref_clks[2]),
// // DDS::new(self.parts.spi7, f_ref_clks[3]),
// // ],
// parts: None,
// config_register: None,
// attenuator: None,
// dds: [None, None, None, None],
// }
// }
// pub fn init(&'a mut self, f_ref_clks:[u64; 4]) {
// self.parts = Some(self.cpld.split());
// self.config_register = Some(ConfigRegister::new(self.parts.unwrap().spi1));
// self.attenuator = Some(Attenuator::new(self.parts.unwrap().spi2));
// self.dds[0] = Some(DDS::new(self.parts.unwrap().spi4, f_ref_clks[0]));
// self.dds[1] = Some(DDS::new(self.parts.unwrap().spi5, f_ref_clks[1]));
// self.dds[2] = Some(DDS::new(self.parts.unwrap().spi6, f_ref_clks[2]));
// self.dds[3] = Some(DDS::new(self.parts.unwrap().spi7, f_ref_clks[3]));
// }
// }
fn set_clock_division(&mut self, division: u8) -> Result<(), Self::Error> {
let result = match division {
1 => self.config_register.set_configurations(&mut [
(CFGMask::DIV, 1),
]),
2 => self.config_register.set_configurations(&mut [
(CFGMask::DIV, 2),
]),
4 => self.config_register.set_configurations(&mut [
(CFGMask::DIV, 3),
]),
_ => Err(Error::ParameterError),
};
match result {
Ok(_) => Ok(()),
Err(_e) => Err(_e),
}
}
}

2
src/nal_tcp_client.rs
View File

@ -3,7 +3,7 @@ use nb;
use heapless::{consts, Vec};
use stm32h7_ethernet as ethernet;
use stm32h7xx_hal::ethernet;
use smoltcp as net;
use cortex_m_semihosting::hprintln;

156
src/scpi.rs
View File

@ -7,6 +7,7 @@ use scpi::NumericValues;
use core::convert::{TryFrom, TryInto};
use core::str;
use core::str::Utf8Error;
use scpi::ieee488::commands::*;
use scpi::scpi::commands::*;
use scpi::{
@ -31,7 +32,12 @@ use scpi::{
use embedded_hal::blocking::spi::Transfer;
use cortex_m_semihosting::hprintln;
use crate::{Urukul, UrukulTraits, Error as UrukulError};
use crate::{
Urukul,
UrukulTraits,
Error as UrukulError,
ClockSource,
};
#[macro_export]
macro_rules! recursive_scpi_tree {
@ -56,7 +62,7 @@ macro_rules! recursive_scpi_tree {
};
// Handle optional header with sub-commands
([$header_name: expr] => {$($($rest: tt)=>*);*}) => {
([$header_name: expr] => {$($($rest: tt)=>*),*}) => {
Node {
name: str::as_bytes($header_name),
handler: None,
@ -70,7 +76,7 @@ macro_rules! recursive_scpi_tree {
};
// Handle non-optional header with sub-commands
($header_name: expr => {$($($rest: tt)=>*);*}) => {
($header_name: expr => {$($($rest: tt)=>*),*}) => {
Node {
name: str::as_bytes($header_name),
handler: None,
@ -86,7 +92,7 @@ macro_rules! recursive_scpi_tree {
#[macro_export]
macro_rules! scpi_root {
($($($node: tt)=>*);*) => {
($($($node: tt)=>*),*) => {
&Node {
name: b"ROOT",
optional: false,
@ -131,31 +137,34 @@ impl<T: Device> Command<T> for HelloWorldCommand {
}
}
macro_rules! declare_channel_commands {
($($header: ident),*) => {
mashup! {
$(
m["channel0" $header] = Channel0 $header Command;
m["channel1" $header] = Channel1 $header Command;
m["channel2" $header] = Channel2 $header Command;
m["channel3" $header] = Channel3 $header Command;
)*
}
pub struct Channel0SwitchCommand {}
pub struct Channel1SwitchCommand {}
pub struct Channel2SwitchCommand {}
pub struct Channel3SwitchCommand {}
pub struct ClockSourceCommand {}
pub struct ClockDivisionCommand {}
m! {
$(
pub struct "channel0" $header {}
pub struct "channel1" $header {}
pub struct "channel2" $header {}
pub struct "channel3" $header {}
)*
impl<T: Device + UrukulTraits> Command<T> for Channel0SwitchCommand {
nquery!();
fn event(&self, context: &mut Context<T>, args: &mut Tokenizer) -> Result<()> {
match context.device.get_channel_switch_status(0) {
Ok(status) => {
let next_state: bool = match args.next_data(true) {
Ok(Some(token)) => token.try_into()?,
Ok(None) => !status,
Err(_) => return Err(ErrorCode::IllegalParameterValue.into()),
};
match context.device.set_channel_switch(0, next_state) {
Ok(()) => Ok(()),
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
}
},
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
}
};
}
}
declare_channel_commands!(Switch);
// pub struct Channel1SwitchCommand {}
impl<T: Device + UrukulTraits> Command<T> for Channel1SwitchCommand {
nquery!();
@ -169,7 +178,6 @@ impl<T: Device + UrukulTraits> Command<T> for Channel1SwitchCommand {
};
match context.device.set_channel_switch(1, next_state) {
Ok(()) => Ok(()),
Err(T) => panic!("Switched an illegal channel!"),
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
}
},
@ -178,6 +186,102 @@ impl<T: Device + UrukulTraits> Command<T> for Channel1SwitchCommand {
}
}
impl<T: Device + UrukulTraits> Command<T> for Channel2SwitchCommand {
nquery!();
fn event(&self, context: &mut Context<T>, args: &mut Tokenizer) -> Result<()> {
match context.device.get_channel_switch_status(2) {
Ok(status) => {
let next_state: bool = match args.next_data(true) {
Ok(Some(token)) => token.try_into()?,
Ok(None) => !status,
Err(_) => return Err(ErrorCode::IllegalParameterValue.into()),
};
match context.device.set_channel_switch(2, next_state) {
Ok(()) => Ok(()),
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
}
},
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
}
}
}
impl<T: Device + UrukulTraits> Command<T> for Channel3SwitchCommand {
nquery!();
fn event(&self, context: &mut Context<T>, args: &mut Tokenizer) -> Result<()> {
match context.device.get_channel_switch_status(3) {
Ok(status) => {
let next_state: bool = match args.next_data(true) {
Ok(Some(token)) => token.try_into()?,
Ok(None) => !status,
Err(_) => return Err(ErrorCode::IllegalParameterValue.into()),
};
match context.device.set_channel_switch(3, next_state) {
Ok(()) => Ok(()),
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
}
},
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
}
}
}
impl<T:Device + UrukulTraits> Command<T> for ClockSourceCommand {
nquery!();
fn event(&self, context: &mut Context<T>, args: &mut Tokenizer) -> Result<()> {
let data: &[u8] = match args.next_data(false)? {
Some(Token::CharacterProgramData(s)) => s,
_ => return Err(ErrorCode::IllegalParameterValue.into()),
};
let result = match str::from_utf8(data) {
Ok(str_param) => match str_param {
"OSC" => context.device.set_clock_source(ClockSource::OSC),
"MMCX" => context.device.set_clock_source(ClockSource::MMCX),
"SMA" => context.device.set_clock_source(ClockSource::SMA),
_ => return Err(ErrorCode::IllegalParameterValue.into()),
}
_ => return Err(ErrorCode::IllegalParameterValue.into()),
};
match result {
Ok(_) => Ok(()),
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
}
}
}
impl<T:Device + UrukulTraits> Command<T> for ClockDivisionCommand {
nquery!();
fn event(&self, context: &mut Context<T>, args: &mut Tokenizer) -> Result<()> {
let data :u8 = match args.next_data(false)? {
Some(token) => {
match f32::try_from(token) {
Ok(val) => {
hprintln!("{}", val).unwrap();
if val == 1.0 || val == 2.0 || val == 4.0 {
val as u8
} else {
return Err(ErrorCode::IllegalParameterValue.into())
}
},
Err(_e) => {
hprintln!("Checked numberic error").unwrap();
return Err(ErrorCode::IllegalParameterValue.into())
},
}
},
_ => return Err(ErrorCode::IllegalParameterValue.into()),
};
match context.device.set_clock_division(data) {
Ok(()) => Ok(()),
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
}
}
}
/*
* Implement "Device" trait from SCPI
* TODO: Implement mandatory commands