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No commits in common. "7665a23896d0558dd7d0e865a62dddc13acd7008" and "c740386d6bbb12feac4ab8df50883aa6c300ee83" have entirely different histories.

8 changed files with 154 additions and 227 deletions

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@ -11,13 +11,12 @@ panic-halt = "0.2.0"
cortex-m = "0.6.2" cortex-m = "0.6.2"
cortex-m-rt = "0.6.12" cortex-m-rt = "0.6.12"
embedded-hal = "0.2.4" embedded-hal = "0.2.4"
stm32h7xx-hal = {version = "0.7.1", features = [ "stm32h743v", "rt", "unproven", "ethernet", "phy_lan8742a" ] } stm32h7xx-hal = {version = "0.6.0", features = [ "stm32h743v", "rt", "unproven" ] }
# stm32h7-ethernet = { version = "0.2.0", features = [ "phy_lan8742a", "stm32h743v" ] } stm32h7-ethernet = { version = "0.2.0", features = [ "phy_lan8742a", "stm32h743v" ] }
smoltcp = { version = "0.6.0", default-features = false, features = [ "ethernet", "proto-ipv4", "proto-ipv6", "socket-tcp" ] } smoltcp = { version = "0.6.0", default-features = false, features = [ "ethernet", "proto-ipv4", "proto-ipv6", "socket-raw" ] }
nb = "1.0.0" nb = "1.0.0"
# scpi = { path = "../scpi-fork/scpi", version = "0.3.4" } # scpi = { path = "../scpi-fork/scpi", version = "0.3.4" }
scpi = { git = "https://github.com/occheung/scpi-rs", branch = "issue-4" } scpi = { git = "https://github.com/occheung/scpi-rs", branch = "issue-4" }
mashup = "0.1.12"
lexical-core = { version="0.7.1", features=["radix"], default-features=false } lexical-core = { version="0.7.1", features=["radix"], default-features=false }
libm = "0.2.0" libm = "0.2.0"

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@ -21,9 +21,8 @@ use cortex_m_semihosting::hprintln;
extern crate smoltcp; extern crate smoltcp;
// Ethernet crate for STM32H7 has been merged into HAL in the latest commit // Ethernet crate for STM32H7 has been merged into HAL in the latest commit
// extern crate stm32h7_ethernet as ethernet; extern crate stm32h7_ethernet as ethernet;
use stm32h7xx_hal::ethernet;
use stm32h7xx_hal::gpio::Speed; use stm32h7xx_hal::gpio::Speed;
use stm32h7xx_hal::hal::digital::v2::{ use stm32h7xx_hal::hal::digital::v2::{
OutputPin, OutputPin,
@ -35,6 +34,16 @@ use Speed::*;
use libm::round; use libm::round;
/*
#[cfg(feature = "itm")]
use cortex_m_log::log::{trick_init, Logger};
#[cfg(feature = "itm")]
use cortex_m_log::{
destination::Itm, printer::itm::InterruptSync as InterruptSyncItm,
};
*/
use core::{ use core::{
str, str,
fmt::Write fmt::Write
@ -67,15 +76,7 @@ use firmware::{
cpld::{ cpld::{
CPLD, CPLD,
}, },
scpi::{ scpi::{ HelloWorldCommand, Channel1SwitchCommand},
HelloWorldCommand,
Channel0SwitchCommand,
Channel1SwitchCommand,
Channel2SwitchCommand,
Channel3SwitchCommand,
ClockSourceCommand,
ClockDivisionCommand,
},
Urukul, Urukul,
scpi_root, recursive_scpi_tree scpi_root, recursive_scpi_tree
}; };
@ -245,7 +246,7 @@ fn main() -> ! {
let mac_addr = smoltcp::wire::EthernetAddress::from_bytes(&MAC_ADDRESS); let mac_addr = smoltcp::wire::EthernetAddress::from_bytes(&MAC_ADDRESS);
let (_eth_dma, mut eth_mac) = unsafe { let (_eth_dma, mut eth_mac) = unsafe {
ethernet::new_unchecked( ethernet::ethernet_init(
dp.ETHERNET_MAC, dp.ETHERNET_MAC,
dp.ETHERNET_MTL, dp.ETHERNET_MTL,
dp.ETHERNET_DMA, dp.ETHERNET_DMA,
@ -295,27 +296,8 @@ fn main() -> ! {
// SCPI configs // SCPI configs
let tree = scpi_root!( let tree = scpi_root!(
["EXAMple"] => { ["EXAMple"] => {"HELLO" => {"WORLD" => HelloWorldCommand}};
"HELLO" => { "CHANNEL1" => {"SWitch" => Channel1SwitchCommand}
"WORLD" => HelloWorldCommand
}
},
"CHANNEL0" => {
"SWitch" => Channel0SwitchCommand
},
"CHANNEL1" => {
"SWitch" => Channel1SwitchCommand
},
"CHANNEL2" => {
"SWitch" => Channel2SwitchCommand
},
"CHANNEL3" => {
"SWitch" => Channel3SwitchCommand
},
"CLOCK" => {
"SOURCE" => ClockSourceCommand,
"DIVision" => ClockDivisionCommand
}
); );
// Device was declared in prior // Device was declared in prior
@ -369,6 +351,23 @@ fn main() -> ! {
}, },
}; };
// Float rounding test socket (:6969)
{
let mut socket = sockets.get::<TcpSocket>(tcp1_handle);
if !socket.is_open() {
socket.listen(6969).unwrap();
socket.set_timeout(Some(Duration::from_millis(5000)));
}
if socket.can_recv() {
let data = socket.recv(|buffer| {
(buffer.len(), buffer)
}).unwrap();
hprintln!("{:?}", data).unwrap();
let result = lexical_core::parse_partial::<f64>(data).unwrap();
writeln!(socket, "{}", round(result.0 * 2.0));
}
}
// SCPI interaction socket (:7000) // SCPI interaction socket (:7000)
{ {
let mut socket = sockets.get::<TcpSocket>(silent_handle); let mut socket = sockets.get::<TcpSocket>(silent_handle);

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@ -2,7 +2,7 @@
#![no_main] #![no_main]
use smoltcp as net; use smoltcp as net;
use stm32h7xx_hal::ethernet; use stm32h7_ethernet as ethernet;
use stm32h7xx_hal::{gpio::Speed, prelude::*, spi, pac}; use stm32h7xx_hal::{gpio::Speed, prelude::*, spi, pac};
use embedded_hal::{blocking::spi::Transfer}; use embedded_hal::{blocking::spi::Transfer};
@ -103,7 +103,7 @@ fn main() -> ! {
// Configure ethernet // Configure ethernet
let mac_addr = net::wire::EthernetAddress([0xAC, 0x6F, 0x7A, 0xDE, 0xD6, 0xC8]); let mac_addr = net::wire::EthernetAddress([0xAC, 0x6F, 0x7A, 0xDE, 0xD6, 0xC8]);
let (eth_dma, _eth_mac) = unsafe { let (eth_dma, _eth_mac) = unsafe {
ethernet::new_unchecked( ethernet::ethernet_init(
dp.ETHERNET_MAC, dp.ETHERNET_MAC,
dp.ETHERNET_MTL, dp.ETHERNET_MTL,
dp.ETHERNET_DMA, dp.ETHERNET_DMA,

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@ -16,7 +16,9 @@ use cortex_m_semihosting::hprintln;
extern crate smoltcp; extern crate smoltcp;
use stm32h7xx_hal::ethernet; // Ethernet crate for STM32H7 has been merged into HAL in the latest commit
extern crate stm32h7_ethernet as ethernet;
use stm32h7xx_hal::gpio::Speed; use stm32h7xx_hal::gpio::Speed;
use stm32h7xx_hal::hal::digital::v2::{ use stm32h7xx_hal::hal::digital::v2::{
OutputPin, OutputPin,
@ -205,7 +207,7 @@ fn main() -> ! {
let mac_addr = smoltcp::wire::EthernetAddress::from_bytes(&MAC_ADDRESS); let mac_addr = smoltcp::wire::EthernetAddress::from_bytes(&MAC_ADDRESS);
let (_eth_dma, mut eth_mac) = unsafe { let (_eth_dma, mut eth_mac) = unsafe {
ethernet::new_unchecked( ethernet::ethernet_init(
dp.ETHERNET_MAC, dp.ETHERNET_MAC,
dp.ETHERNET_MTL, dp.ETHERNET_MTL,
dp.ETHERNET_DMA, dp.ETHERNET_DMA,
@ -319,13 +321,13 @@ fn main() -> ! {
{ {
let mut socket = socket_set.get::<TcpSocket>(client_handle); let mut socket = socket_set.get::<TcpSocket>(client_handle);
if !socket.is_open() { if !socket.is_open() || !socket.can_send() {
socket.abort(); socket.abort();
socket.close(); socket.close();
hprintln!("reset state: {}", socket.state()).unwrap(); // hprintln!("reset state: {}", socket.state()).unwrap();
socket.connect((IpAddress::v4(192, 168, 1, 200), 1883), socket.connect((IpAddress::v4(192, 168, 1, 200), 1883),
(IpAddress::Unspecified, 45000)).unwrap(); (IpAddress::Unspecified, 45000)).unwrap();
hprintln!("post connect state: {}", socket.state()).unwrap(); // hprintln!("post connect state: {}", socket.state()).unwrap();
} }
// hprintln!("client state: {}", socket.state()).unwrap(); // hprintln!("client state: {}", socket.state()).unwrap();

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@ -1,7 +1,8 @@
MEMORY MEMORY
{ {
/* FLASH and RAM are mandatory memory regions */ /* FLASH and RAM are mandatory memory regions */
FLASH : ORIGIN = 0x08000000, LENGTH = 2M FLASH : ORIGIN = 0x08000000, LENGTH = 1024K
FLASH1 : ORIGIN = 0x08100000, LENGTH = 1024K
RAM : ORIGIN = 0x20000000, LENGTH = 128K RAM : ORIGIN = 0x20000000, LENGTH = 128K
/* AXISRAM */ /* AXISRAM */
@ -10,7 +11,7 @@ MEMORY
/* SRAM */ /* SRAM */
SRAM1 : ORIGIN = 0x30000000, LENGTH = 128K SRAM1 : ORIGIN = 0x30000000, LENGTH = 128K
SRAM2 : ORIGIN = 0x30020000, LENGTH = 128K SRAM2 : ORIGIN = 0x30020000, LENGTH = 128K
SRAM3 (rwx) : ORIGIN = 0x30040000, LENGTH = 32K SRAM3 : ORIGIN = 0x30040000, LENGTH = 32K
SRAM4 : ORIGIN = 0x38000000, LENGTH = 64K SRAM4 : ORIGIN = 0x38000000, LENGTH = 64K
/* Backup SRAM */ /* Backup SRAM */
@ -30,10 +31,22 @@ _stack_start = ORIGIN(RAM) + LENGTH(RAM);
/* _stext = ORIGIN(FLASH) + 0x40c; */ /* _stext = ORIGIN(FLASH) + 0x40c; */
SECTIONS { SECTIONS {
.itcm : ALIGN(8) {
*(.itcm .itcm.*);
. = ALIGN(8);
} > ITCM
.axisram : ALIGN(8) { .axisram : ALIGN(8) {
*(.axisram .axisram.*); *(.axisram .axisram.*);
. = ALIGN(8); . = ALIGN(8);
} > AXISRAM } > AXISRAM
.sram1 (NOLOAD) : ALIGN(4) {
*(.sram1 .sram1.*);
. = ALIGN(4);
} > SRAM1
.sram2 (NOLOAD) : ALIGN(4) {
*(.sram2 .sram2.*);
. = ALIGN(4);
} > SRAM2
.sram3 (NOLOAD) : ALIGN(4) { .sram3 (NOLOAD) : ALIGN(4) {
*(.sram3 .sram3.*); *(.sram3 .sram3.*);
. = ALIGN(4); . = ALIGN(4);

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@ -12,9 +12,6 @@ use core::{
use cortex_m; use cortex_m;
use cortex_m_semihosting::hprintln; use cortex_m_semihosting::hprintln;
#[macro_use]
extern crate mashup;
#[macro_use] #[macro_use]
pub mod bitmask_macro; pub mod bitmask_macro;
@ -59,12 +56,6 @@ pub enum Error<E> {
ParameterError, ParameterError,
} }
pub enum ClockSource {
OSC,
SMA,
MMCX,
}
/* /*
* Struct for Urukul master device * Struct for Urukul master device
*/ */
@ -154,8 +145,6 @@ pub trait UrukulTraits {
type Error; type Error;
fn get_channel_switch_status(&mut self, channel: u32) -> Result<bool, Self::Error>; fn get_channel_switch_status(&mut self, channel: u32) -> Result<bool, Self::Error>;
fn set_channel_switch(&mut self, channel: u32, status: bool) -> Result<(), Self::Error>; fn set_channel_switch(&mut self, channel: u32, status: bool) -> Result<(), Self::Error>;
fn set_clock_source(&mut self, source: ClockSource) -> Result<(), Self::Error>;
fn set_clock_division(&mut self, division: u8) -> Result<(), Self::Error>;
} }
impl<SPI, E> UrukulTraits for Urukul<SPI> impl<SPI, E> UrukulTraits for Urukul<SPI>
@ -196,42 +185,71 @@ where
} }
} }
fn set_clock_source(&mut self, source: ClockSource) -> Result<(), Self::Error> { // fn switch_on(&mut self, channel: u32) -> Result<(), Self::Error>{
let result = match source { // if channel < 16 {
ClockSource::OSC => self.config_register.set_configurations(&mut [ // let switch_set = channel | u32::from(self.config_register.get_status(StatusMask::RF_SW)?);
(CFGMask::CLK_SEL0, 0),
(CFGMask::CLK_SEL1, 0),
]),
ClockSource::MMCX => self.config_register.set_configurations(&mut [
(CFGMask::CLK_SEL0, 0),
(CFGMask::CLK_SEL1, 1),
]),
ClockSource::SMA => self.config_register.set_configurations(&mut [
(CFGMask::CLK_SEL0, 1),
]),
};
match result {
Ok(_) => Ok(()),
Err(_e) => Err(_e),
}
}
fn set_clock_division(&mut self, division: u8) -> Result<(), Self::Error> { // match self.config_register.set_configurations(&mut [
let result = match division { // (CFGMask::RF_SW, switch_set),
1 => self.config_register.set_configurations(&mut [ // ]) {
(CFGMask::DIV, 1), // Ok(_) => Ok(()),
]), // Err(_e) => Err(_e),
2 => self.config_register.set_configurations(&mut [ // }
(CFGMask::DIV, 2), // } else {
]), // Err(Error::ParameterError)
4 => self.config_register.set_configurations(&mut [ // }
(CFGMask::DIV, 3), // }
]),
_ => Err(Error::ParameterError),
};
match result {
Ok(_) => Ok(()),
Err(_e) => Err(_e),
}
}
} }
// /*
// * Struct for a better Urukul master device
// */
// pub struct BetterUrukul<'a, SPI, CS0, CS1, CS2, GPIO> {
// cpld: CPLD<SPI, CS0, CS1, CS2, GPIO>,
// parts: Option<Parts<'a, CPLD<SPI, CS0, CS1, CS2, GPIO>, SPI, CS0, CS1, CS2, GPIO>>,
// config_register: Option<ConfigRegister<SPISlave<'a, CPLD<SPI, CS0, CS1, CS2, GPIO>, SPI, CS0, CS1, CS2, GPIO>>>,
// attenuator: Option<Attenuator<SPISlave<'a, CPLD<SPI, CS0, CS1, CS2, GPIO>, SPI, CS0, CS1, CS2, GPIO>>>,
// dds: [Option<DDS<SPISlave<'a, CPLD<SPI, CS0, CS1, CS2, GPIO>, SPI, CS0, CS1, CS2, GPIO>>>; 4],
// }
// impl<'a, SPI, CS0, CS1, CS2, GPIO> BetterUrukul<'a, SPI, CS0, CS1, CS2, GPIO>
// where
// SPI: Transfer<u8>,
// CS0: OutputPin,
// CS1: OutputPin,
// CS2: OutputPin,
// GPIO: OutputPin,
// {
// pub fn new(spi: SPI, chip_select: (CS0, CS1, CS2), io_update: GPIO) -> Self {
// // let switch = CPLD::new(spi, chip_select, io_update);
// // let parts = switch.split();
// // Construct Urukul
// BetterUrukul {
// cpld: CPLD::new(spi, chip_select, io_update),
// // parts: CPLD::new(spi, chip_select, io_update).split(),
// // config_register: ConfigRegister::new(self.parts.spi1),
// // attenuator: Attenuator::new(self.parts.spi2),
// // dds: [
// // DDS::new(self.parts.spi4, f_ref_clks[1]),
// // DDS::new(self.parts.spi5, f_ref_clks[1]),
// // DDS::new(self.parts.spi6, f_ref_clks[2]),
// // DDS::new(self.parts.spi7, f_ref_clks[3]),
// // ],
// parts: None,
// config_register: None,
// attenuator: None,
// dds: [None, None, None, None],
// }
// }
// pub fn init(&'a mut self, f_ref_clks:[u64; 4]) {
// self.parts = Some(self.cpld.split());
// self.config_register = Some(ConfigRegister::new(self.parts.unwrap().spi1));
// self.attenuator = Some(Attenuator::new(self.parts.unwrap().spi2));
// self.dds[0] = Some(DDS::new(self.parts.unwrap().spi4, f_ref_clks[0]));
// self.dds[1] = Some(DDS::new(self.parts.unwrap().spi5, f_ref_clks[1]));
// self.dds[2] = Some(DDS::new(self.parts.unwrap().spi6, f_ref_clks[2]));
// self.dds[3] = Some(DDS::new(self.parts.unwrap().spi7, f_ref_clks[3]));
// }
// }

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@ -3,7 +3,7 @@ use nb;
use heapless::{consts, Vec}; use heapless::{consts, Vec};
use stm32h7xx_hal::ethernet; use stm32h7_ethernet as ethernet;
use smoltcp as net; use smoltcp as net;
use cortex_m_semihosting::hprintln; use cortex_m_semihosting::hprintln;

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@ -7,7 +7,6 @@ use scpi::NumericValues;
use core::convert::{TryFrom, TryInto}; use core::convert::{TryFrom, TryInto};
use core::str; use core::str;
use core::str::Utf8Error;
use scpi::ieee488::commands::*; use scpi::ieee488::commands::*;
use scpi::scpi::commands::*; use scpi::scpi::commands::*;
use scpi::{ use scpi::{
@ -32,12 +31,7 @@ use scpi::{
use embedded_hal::blocking::spi::Transfer; use embedded_hal::blocking::spi::Transfer;
use cortex_m_semihosting::hprintln; use cortex_m_semihosting::hprintln;
use crate::{ use crate::{Urukul, UrukulTraits, Error as UrukulError};
Urukul,
UrukulTraits,
Error as UrukulError,
ClockSource,
};
#[macro_export] #[macro_export]
macro_rules! recursive_scpi_tree { macro_rules! recursive_scpi_tree {
@ -62,7 +56,7 @@ macro_rules! recursive_scpi_tree {
}; };
// Handle optional header with sub-commands // Handle optional header with sub-commands
([$header_name: expr] => {$($($rest: tt)=>*),*}) => { ([$header_name: expr] => {$($($rest: tt)=>*);*}) => {
Node { Node {
name: str::as_bytes($header_name), name: str::as_bytes($header_name),
handler: None, handler: None,
@ -76,7 +70,7 @@ macro_rules! recursive_scpi_tree {
}; };
// Handle non-optional header with sub-commands // Handle non-optional header with sub-commands
($header_name: expr => {$($($rest: tt)=>*),*}) => { ($header_name: expr => {$($($rest: tt)=>*);*}) => {
Node { Node {
name: str::as_bytes($header_name), name: str::as_bytes($header_name),
handler: None, handler: None,
@ -92,7 +86,7 @@ macro_rules! recursive_scpi_tree {
#[macro_export] #[macro_export]
macro_rules! scpi_root { macro_rules! scpi_root {
($($($node: tt)=>*),*) => { ($($($node: tt)=>*);*) => {
&Node { &Node {
name: b"ROOT", name: b"ROOT",
optional: false, optional: false,
@ -137,34 +131,31 @@ impl<T: Device> Command<T> for HelloWorldCommand {
} }
} }
pub struct Channel0SwitchCommand {} macro_rules! declare_channel_commands {
pub struct Channel1SwitchCommand {} ($($header: ident),*) => {
pub struct Channel2SwitchCommand {} mashup! {
pub struct Channel3SwitchCommand {} $(
pub struct ClockSourceCommand {} m["channel0" $header] = Channel0 $header Command;
pub struct ClockDivisionCommand {} m["channel1" $header] = Channel1 $header Command;
m["channel2" $header] = Channel2 $header Command;
impl<T: Device + UrukulTraits> Command<T> for Channel0SwitchCommand { m["channel3" $header] = Channel3 $header Command;
nquery!(); )*
fn event(&self, context: &mut Context<T>, args: &mut Tokenizer) -> Result<()> {
match context.device.get_channel_switch_status(0) {
Ok(status) => {
let next_state: bool = match args.next_data(true) {
Ok(Some(token)) => token.try_into()?,
Ok(None) => !status,
Err(_) => return Err(ErrorCode::IllegalParameterValue.into()),
};
match context.device.set_channel_switch(0, next_state) {
Ok(()) => Ok(()),
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
}
},
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
} }
}
m! {
$(
pub struct "channel0" $header {}
pub struct "channel1" $header {}
pub struct "channel2" $header {}
pub struct "channel3" $header {}
)*
}
};
} }
declare_channel_commands!(Switch);
// pub struct Channel1SwitchCommand {}
impl<T: Device + UrukulTraits> Command<T> for Channel1SwitchCommand { impl<T: Device + UrukulTraits> Command<T> for Channel1SwitchCommand {
nquery!(); nquery!();
@ -178,6 +169,7 @@ impl<T: Device + UrukulTraits> Command<T> for Channel1SwitchCommand {
}; };
match context.device.set_channel_switch(1, next_state) { match context.device.set_channel_switch(1, next_state) {
Ok(()) => Ok(()), Ok(()) => Ok(()),
Err(T) => panic!("Switched an illegal channel!"),
Err(_) => Err(Error::new(ErrorCode::HardwareError)), Err(_) => Err(Error::new(ErrorCode::HardwareError)),
} }
}, },
@ -186,102 +178,6 @@ impl<T: Device + UrukulTraits> Command<T> for Channel1SwitchCommand {
} }
} }
impl<T: Device + UrukulTraits> Command<T> for Channel2SwitchCommand {
nquery!();
fn event(&self, context: &mut Context<T>, args: &mut Tokenizer) -> Result<()> {
match context.device.get_channel_switch_status(2) {
Ok(status) => {
let next_state: bool = match args.next_data(true) {
Ok(Some(token)) => token.try_into()?,
Ok(None) => !status,
Err(_) => return Err(ErrorCode::IllegalParameterValue.into()),
};
match context.device.set_channel_switch(2, next_state) {
Ok(()) => Ok(()),
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
}
},
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
}
}
}
impl<T: Device + UrukulTraits> Command<T> for Channel3SwitchCommand {
nquery!();
fn event(&self, context: &mut Context<T>, args: &mut Tokenizer) -> Result<()> {
match context.device.get_channel_switch_status(3) {
Ok(status) => {
let next_state: bool = match args.next_data(true) {
Ok(Some(token)) => token.try_into()?,
Ok(None) => !status,
Err(_) => return Err(ErrorCode::IllegalParameterValue.into()),
};
match context.device.set_channel_switch(3, next_state) {
Ok(()) => Ok(()),
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
}
},
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
}
}
}
impl<T:Device + UrukulTraits> Command<T> for ClockSourceCommand {
nquery!();
fn event(&self, context: &mut Context<T>, args: &mut Tokenizer) -> Result<()> {
let data: &[u8] = match args.next_data(false)? {
Some(Token::CharacterProgramData(s)) => s,
_ => return Err(ErrorCode::IllegalParameterValue.into()),
};
let result = match str::from_utf8(data) {
Ok(str_param) => match str_param {
"OSC" => context.device.set_clock_source(ClockSource::OSC),
"MMCX" => context.device.set_clock_source(ClockSource::MMCX),
"SMA" => context.device.set_clock_source(ClockSource::SMA),
_ => return Err(ErrorCode::IllegalParameterValue.into()),
}
_ => return Err(ErrorCode::IllegalParameterValue.into()),
};
match result {
Ok(_) => Ok(()),
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
}
}
}
impl<T:Device + UrukulTraits> Command<T> for ClockDivisionCommand {
nquery!();
fn event(&self, context: &mut Context<T>, args: &mut Tokenizer) -> Result<()> {
let data :u8 = match args.next_data(false)? {
Some(token) => {
match f32::try_from(token) {
Ok(val) => {
hprintln!("{}", val).unwrap();
if val == 1.0 || val == 2.0 || val == 4.0 {
val as u8
} else {
return Err(ErrorCode::IllegalParameterValue.into())
}
},
Err(_e) => {
hprintln!("Checked numberic error").unwrap();
return Err(ErrorCode::IllegalParameterValue.into())
},
}
},
_ => return Err(ErrorCode::IllegalParameterValue.into()),
};
match context.device.set_clock_division(data) {
Ok(()) => Ok(()),
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
}
}
}
/* /*
* Implement "Device" trait from SCPI * Implement "Device" trait from SCPI
* TODO: Implement mandatory commands * TODO: Implement mandatory commands