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No commits in common. "7665a23896d0558dd7d0e865a62dddc13acd7008" and "c740386d6bbb12feac4ab8df50883aa6c300ee83" have entirely different histories.
7665a23896
...
c740386d6b
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@ -11,13 +11,12 @@ panic-halt = "0.2.0"
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cortex-m = "0.6.2"
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cortex-m = "0.6.2"
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cortex-m-rt = "0.6.12"
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cortex-m-rt = "0.6.12"
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embedded-hal = "0.2.4"
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embedded-hal = "0.2.4"
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stm32h7xx-hal = {version = "0.7.1", features = [ "stm32h743v", "rt", "unproven", "ethernet", "phy_lan8742a" ] }
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stm32h7xx-hal = {version = "0.6.0", features = [ "stm32h743v", "rt", "unproven" ] }
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# stm32h7-ethernet = { version = "0.2.0", features = [ "phy_lan8742a", "stm32h743v" ] }
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stm32h7-ethernet = { version = "0.2.0", features = [ "phy_lan8742a", "stm32h743v" ] }
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smoltcp = { version = "0.6.0", default-features = false, features = [ "ethernet", "proto-ipv4", "proto-ipv6", "socket-tcp" ] }
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smoltcp = { version = "0.6.0", default-features = false, features = [ "ethernet", "proto-ipv4", "proto-ipv6", "socket-raw" ] }
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nb = "1.0.0"
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nb = "1.0.0"
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# scpi = { path = "../scpi-fork/scpi", version = "0.3.4" }
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# scpi = { path = "../scpi-fork/scpi", version = "0.3.4" }
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scpi = { git = "https://github.com/occheung/scpi-rs", branch = "issue-4" }
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scpi = { git = "https://github.com/occheung/scpi-rs", branch = "issue-4" }
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mashup = "0.1.12"
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lexical-core = { version="0.7.1", features=["radix"], default-features=false }
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lexical-core = { version="0.7.1", features=["radix"], default-features=false }
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libm = "0.2.0"
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libm = "0.2.0"
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@ -21,9 +21,8 @@ use cortex_m_semihosting::hprintln;
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extern crate smoltcp;
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extern crate smoltcp;
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// Ethernet crate for STM32H7 has been merged into HAL in the latest commit
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// Ethernet crate for STM32H7 has been merged into HAL in the latest commit
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// extern crate stm32h7_ethernet as ethernet;
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extern crate stm32h7_ethernet as ethernet;
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use stm32h7xx_hal::ethernet;
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use stm32h7xx_hal::gpio::Speed;
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use stm32h7xx_hal::gpio::Speed;
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use stm32h7xx_hal::hal::digital::v2::{
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use stm32h7xx_hal::hal::digital::v2::{
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OutputPin,
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OutputPin,
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@ -35,6 +34,16 @@ use Speed::*;
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use libm::round;
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use libm::round;
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/*
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#[cfg(feature = "itm")]
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use cortex_m_log::log::{trick_init, Logger};
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#[cfg(feature = "itm")]
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use cortex_m_log::{
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destination::Itm, printer::itm::InterruptSync as InterruptSyncItm,
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};
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*/
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use core::{
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use core::{
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str,
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str,
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fmt::Write
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fmt::Write
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@ -67,15 +76,7 @@ use firmware::{
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cpld::{
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cpld::{
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CPLD,
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CPLD,
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},
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},
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scpi::{
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scpi::{ HelloWorldCommand, Channel1SwitchCommand},
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HelloWorldCommand,
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Channel0SwitchCommand,
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Channel1SwitchCommand,
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Channel2SwitchCommand,
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Channel3SwitchCommand,
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ClockSourceCommand,
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ClockDivisionCommand,
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},
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Urukul,
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Urukul,
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scpi_root, recursive_scpi_tree
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scpi_root, recursive_scpi_tree
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};
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};
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@ -245,7 +246,7 @@ fn main() -> ! {
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let mac_addr = smoltcp::wire::EthernetAddress::from_bytes(&MAC_ADDRESS);
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let mac_addr = smoltcp::wire::EthernetAddress::from_bytes(&MAC_ADDRESS);
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let (_eth_dma, mut eth_mac) = unsafe {
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let (_eth_dma, mut eth_mac) = unsafe {
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ethernet::new_unchecked(
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ethernet::ethernet_init(
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dp.ETHERNET_MAC,
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dp.ETHERNET_MAC,
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dp.ETHERNET_MTL,
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dp.ETHERNET_MTL,
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dp.ETHERNET_DMA,
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dp.ETHERNET_DMA,
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@ -295,27 +296,8 @@ fn main() -> ! {
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// SCPI configs
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// SCPI configs
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let tree = scpi_root!(
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let tree = scpi_root!(
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["EXAMple"] => {
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["EXAMple"] => {"HELLO" => {"WORLD" => HelloWorldCommand}};
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"HELLO" => {
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"CHANNEL1" => {"SWitch" => Channel1SwitchCommand}
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"WORLD" => HelloWorldCommand
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}
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},
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"CHANNEL0" => {
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"SWitch" => Channel0SwitchCommand
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},
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"CHANNEL1" => {
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"SWitch" => Channel1SwitchCommand
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},
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"CHANNEL2" => {
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"SWitch" => Channel2SwitchCommand
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},
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"CHANNEL3" => {
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"SWitch" => Channel3SwitchCommand
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},
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"CLOCK" => {
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"SOURCE" => ClockSourceCommand,
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"DIVision" => ClockDivisionCommand
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}
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);
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);
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// Device was declared in prior
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// Device was declared in prior
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@ -369,6 +351,23 @@ fn main() -> ! {
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},
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},
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};
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};
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// Float rounding test socket (:6969)
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{
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let mut socket = sockets.get::<TcpSocket>(tcp1_handle);
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if !socket.is_open() {
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socket.listen(6969).unwrap();
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socket.set_timeout(Some(Duration::from_millis(5000)));
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}
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if socket.can_recv() {
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let data = socket.recv(|buffer| {
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(buffer.len(), buffer)
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}).unwrap();
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hprintln!("{:?}", data).unwrap();
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let result = lexical_core::parse_partial::<f64>(data).unwrap();
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writeln!(socket, "{}", round(result.0 * 2.0));
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}
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}
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// SCPI interaction socket (:7000)
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// SCPI interaction socket (:7000)
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{
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{
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let mut socket = sockets.get::<TcpSocket>(silent_handle);
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let mut socket = sockets.get::<TcpSocket>(silent_handle);
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@ -2,7 +2,7 @@
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#![no_main]
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#![no_main]
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use smoltcp as net;
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use smoltcp as net;
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use stm32h7xx_hal::ethernet;
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use stm32h7_ethernet as ethernet;
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use stm32h7xx_hal::{gpio::Speed, prelude::*, spi, pac};
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use stm32h7xx_hal::{gpio::Speed, prelude::*, spi, pac};
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use embedded_hal::{blocking::spi::Transfer};
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use embedded_hal::{blocking::spi::Transfer};
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@ -103,7 +103,7 @@ fn main() -> ! {
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// Configure ethernet
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// Configure ethernet
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let mac_addr = net::wire::EthernetAddress([0xAC, 0x6F, 0x7A, 0xDE, 0xD6, 0xC8]);
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let mac_addr = net::wire::EthernetAddress([0xAC, 0x6F, 0x7A, 0xDE, 0xD6, 0xC8]);
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let (eth_dma, _eth_mac) = unsafe {
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let (eth_dma, _eth_mac) = unsafe {
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ethernet::new_unchecked(
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ethernet::ethernet_init(
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dp.ETHERNET_MAC,
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dp.ETHERNET_MAC,
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dp.ETHERNET_MTL,
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dp.ETHERNET_MTL,
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dp.ETHERNET_DMA,
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dp.ETHERNET_DMA,
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@ -16,7 +16,9 @@ use cortex_m_semihosting::hprintln;
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extern crate smoltcp;
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extern crate smoltcp;
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use stm32h7xx_hal::ethernet;
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// Ethernet crate for STM32H7 has been merged into HAL in the latest commit
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extern crate stm32h7_ethernet as ethernet;
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use stm32h7xx_hal::gpio::Speed;
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use stm32h7xx_hal::gpio::Speed;
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use stm32h7xx_hal::hal::digital::v2::{
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use stm32h7xx_hal::hal::digital::v2::{
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OutputPin,
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OutputPin,
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@ -205,7 +207,7 @@ fn main() -> ! {
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let mac_addr = smoltcp::wire::EthernetAddress::from_bytes(&MAC_ADDRESS);
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let mac_addr = smoltcp::wire::EthernetAddress::from_bytes(&MAC_ADDRESS);
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let (_eth_dma, mut eth_mac) = unsafe {
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let (_eth_dma, mut eth_mac) = unsafe {
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ethernet::new_unchecked(
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ethernet::ethernet_init(
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dp.ETHERNET_MAC,
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dp.ETHERNET_MAC,
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dp.ETHERNET_MTL,
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dp.ETHERNET_MTL,
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dp.ETHERNET_DMA,
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dp.ETHERNET_DMA,
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@ -319,13 +321,13 @@ fn main() -> ! {
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{
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{
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let mut socket = socket_set.get::<TcpSocket>(client_handle);
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let mut socket = socket_set.get::<TcpSocket>(client_handle);
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if !socket.is_open() {
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if !socket.is_open() || !socket.can_send() {
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socket.abort();
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socket.abort();
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socket.close();
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socket.close();
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hprintln!("reset state: {}", socket.state()).unwrap();
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// hprintln!("reset state: {}", socket.state()).unwrap();
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socket.connect((IpAddress::v4(192, 168, 1, 200), 1883),
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socket.connect((IpAddress::v4(192, 168, 1, 200), 1883),
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(IpAddress::Unspecified, 45000)).unwrap();
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(IpAddress::Unspecified, 45000)).unwrap();
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hprintln!("post connect state: {}", socket.state()).unwrap();
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// hprintln!("post connect state: {}", socket.state()).unwrap();
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}
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}
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|
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// hprintln!("client state: {}", socket.state()).unwrap();
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// hprintln!("client state: {}", socket.state()).unwrap();
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17
memory.x
17
memory.x
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@ -1,7 +1,8 @@
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MEMORY
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MEMORY
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{
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{
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/* FLASH and RAM are mandatory memory regions */
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/* FLASH and RAM are mandatory memory regions */
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FLASH : ORIGIN = 0x08000000, LENGTH = 2M
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FLASH : ORIGIN = 0x08000000, LENGTH = 1024K
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FLASH1 : ORIGIN = 0x08100000, LENGTH = 1024K
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RAM : ORIGIN = 0x20000000, LENGTH = 128K
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RAM : ORIGIN = 0x20000000, LENGTH = 128K
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/* AXISRAM */
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/* AXISRAM */
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@ -10,7 +11,7 @@ MEMORY
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/* SRAM */
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/* SRAM */
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SRAM1 : ORIGIN = 0x30000000, LENGTH = 128K
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SRAM1 : ORIGIN = 0x30000000, LENGTH = 128K
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SRAM2 : ORIGIN = 0x30020000, LENGTH = 128K
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SRAM2 : ORIGIN = 0x30020000, LENGTH = 128K
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SRAM3 (rwx) : ORIGIN = 0x30040000, LENGTH = 32K
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SRAM3 : ORIGIN = 0x30040000, LENGTH = 32K
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SRAM4 : ORIGIN = 0x38000000, LENGTH = 64K
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SRAM4 : ORIGIN = 0x38000000, LENGTH = 64K
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||||||
|
|
||||||
/* Backup SRAM */
|
/* Backup SRAM */
|
||||||
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@ -30,10 +31,22 @@ _stack_start = ORIGIN(RAM) + LENGTH(RAM);
|
||||||
/* _stext = ORIGIN(FLASH) + 0x40c; */
|
/* _stext = ORIGIN(FLASH) + 0x40c; */
|
||||||
|
|
||||||
SECTIONS {
|
SECTIONS {
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||||||
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.itcm : ALIGN(8) {
|
||||||
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*(.itcm .itcm.*);
|
||||||
|
. = ALIGN(8);
|
||||||
|
} > ITCM
|
||||||
.axisram : ALIGN(8) {
|
.axisram : ALIGN(8) {
|
||||||
*(.axisram .axisram.*);
|
*(.axisram .axisram.*);
|
||||||
. = ALIGN(8);
|
. = ALIGN(8);
|
||||||
} > AXISRAM
|
} > AXISRAM
|
||||||
|
.sram1 (NOLOAD) : ALIGN(4) {
|
||||||
|
*(.sram1 .sram1.*);
|
||||||
|
. = ALIGN(4);
|
||||||
|
} > SRAM1
|
||||||
|
.sram2 (NOLOAD) : ALIGN(4) {
|
||||||
|
*(.sram2 .sram2.*);
|
||||||
|
. = ALIGN(4);
|
||||||
|
} > SRAM2
|
||||||
.sram3 (NOLOAD) : ALIGN(4) {
|
.sram3 (NOLOAD) : ALIGN(4) {
|
||||||
*(.sram3 .sram3.*);
|
*(.sram3 .sram3.*);
|
||||||
. = ALIGN(4);
|
. = ALIGN(4);
|
||||||
|
|
114
src/lib.rs
114
src/lib.rs
|
@ -12,9 +12,6 @@ use core::{
|
||||||
use cortex_m;
|
use cortex_m;
|
||||||
use cortex_m_semihosting::hprintln;
|
use cortex_m_semihosting::hprintln;
|
||||||
|
|
||||||
#[macro_use]
|
|
||||||
extern crate mashup;
|
|
||||||
|
|
||||||
#[macro_use]
|
#[macro_use]
|
||||||
pub mod bitmask_macro;
|
pub mod bitmask_macro;
|
||||||
|
|
||||||
|
@ -59,12 +56,6 @@ pub enum Error<E> {
|
||||||
ParameterError,
|
ParameterError,
|
||||||
}
|
}
|
||||||
|
|
||||||
pub enum ClockSource {
|
|
||||||
OSC,
|
|
||||||
SMA,
|
|
||||||
MMCX,
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Struct for Urukul master device
|
* Struct for Urukul master device
|
||||||
*/
|
*/
|
||||||
|
@ -154,8 +145,6 @@ pub trait UrukulTraits {
|
||||||
type Error;
|
type Error;
|
||||||
fn get_channel_switch_status(&mut self, channel: u32) -> Result<bool, Self::Error>;
|
fn get_channel_switch_status(&mut self, channel: u32) -> Result<bool, Self::Error>;
|
||||||
fn set_channel_switch(&mut self, channel: u32, status: bool) -> Result<(), Self::Error>;
|
fn set_channel_switch(&mut self, channel: u32, status: bool) -> Result<(), Self::Error>;
|
||||||
fn set_clock_source(&mut self, source: ClockSource) -> Result<(), Self::Error>;
|
|
||||||
fn set_clock_division(&mut self, division: u8) -> Result<(), Self::Error>;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<SPI, E> UrukulTraits for Urukul<SPI>
|
impl<SPI, E> UrukulTraits for Urukul<SPI>
|
||||||
|
@ -196,42 +185,71 @@ where
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
fn set_clock_source(&mut self, source: ClockSource) -> Result<(), Self::Error> {
|
// fn switch_on(&mut self, channel: u32) -> Result<(), Self::Error>{
|
||||||
let result = match source {
|
// if channel < 16 {
|
||||||
ClockSource::OSC => self.config_register.set_configurations(&mut [
|
// let switch_set = channel | u32::from(self.config_register.get_status(StatusMask::RF_SW)?);
|
||||||
(CFGMask::CLK_SEL0, 0),
|
|
||||||
(CFGMask::CLK_SEL1, 0),
|
// match self.config_register.set_configurations(&mut [
|
||||||
]),
|
// (CFGMask::RF_SW, switch_set),
|
||||||
ClockSource::MMCX => self.config_register.set_configurations(&mut [
|
// ]) {
|
||||||
(CFGMask::CLK_SEL0, 0),
|
// Ok(_) => Ok(()),
|
||||||
(CFGMask::CLK_SEL1, 1),
|
// Err(_e) => Err(_e),
|
||||||
]),
|
// }
|
||||||
ClockSource::SMA => self.config_register.set_configurations(&mut [
|
// } else {
|
||||||
(CFGMask::CLK_SEL0, 1),
|
// Err(Error::ParameterError)
|
||||||
]),
|
// }
|
||||||
};
|
// }
|
||||||
match result {
|
|
||||||
Ok(_) => Ok(()),
|
|
||||||
Err(_e) => Err(_e),
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
fn set_clock_division(&mut self, division: u8) -> Result<(), Self::Error> {
|
// /*
|
||||||
let result = match division {
|
// * Struct for a better Urukul master device
|
||||||
1 => self.config_register.set_configurations(&mut [
|
// */
|
||||||
(CFGMask::DIV, 1),
|
// pub struct BetterUrukul<'a, SPI, CS0, CS1, CS2, GPIO> {
|
||||||
]),
|
// cpld: CPLD<SPI, CS0, CS1, CS2, GPIO>,
|
||||||
2 => self.config_register.set_configurations(&mut [
|
// parts: Option<Parts<'a, CPLD<SPI, CS0, CS1, CS2, GPIO>, SPI, CS0, CS1, CS2, GPIO>>,
|
||||||
(CFGMask::DIV, 2),
|
// config_register: Option<ConfigRegister<SPISlave<'a, CPLD<SPI, CS0, CS1, CS2, GPIO>, SPI, CS0, CS1, CS2, GPIO>>>,
|
||||||
]),
|
// attenuator: Option<Attenuator<SPISlave<'a, CPLD<SPI, CS0, CS1, CS2, GPIO>, SPI, CS0, CS1, CS2, GPIO>>>,
|
||||||
4 => self.config_register.set_configurations(&mut [
|
// dds: [Option<DDS<SPISlave<'a, CPLD<SPI, CS0, CS1, CS2, GPIO>, SPI, CS0, CS1, CS2, GPIO>>>; 4],
|
||||||
(CFGMask::DIV, 3),
|
// }
|
||||||
]),
|
|
||||||
_ => Err(Error::ParameterError),
|
// impl<'a, SPI, CS0, CS1, CS2, GPIO> BetterUrukul<'a, SPI, CS0, CS1, CS2, GPIO>
|
||||||
};
|
// where
|
||||||
match result {
|
// SPI: Transfer<u8>,
|
||||||
Ok(_) => Ok(()),
|
// CS0: OutputPin,
|
||||||
Err(_e) => Err(_e),
|
// CS1: OutputPin,
|
||||||
}
|
// CS2: OutputPin,
|
||||||
}
|
// GPIO: OutputPin,
|
||||||
}
|
// {
|
||||||
|
// pub fn new(spi: SPI, chip_select: (CS0, CS1, CS2), io_update: GPIO) -> Self {
|
||||||
|
// // let switch = CPLD::new(spi, chip_select, io_update);
|
||||||
|
// // let parts = switch.split();
|
||||||
|
|
||||||
|
// // Construct Urukul
|
||||||
|
// BetterUrukul {
|
||||||
|
// cpld: CPLD::new(spi, chip_select, io_update),
|
||||||
|
// // parts: CPLD::new(spi, chip_select, io_update).split(),
|
||||||
|
// // config_register: ConfigRegister::new(self.parts.spi1),
|
||||||
|
// // attenuator: Attenuator::new(self.parts.spi2),
|
||||||
|
// // dds: [
|
||||||
|
// // DDS::new(self.parts.spi4, f_ref_clks[1]),
|
||||||
|
// // DDS::new(self.parts.spi5, f_ref_clks[1]),
|
||||||
|
// // DDS::new(self.parts.spi6, f_ref_clks[2]),
|
||||||
|
// // DDS::new(self.parts.spi7, f_ref_clks[3]),
|
||||||
|
// // ],
|
||||||
|
// parts: None,
|
||||||
|
// config_register: None,
|
||||||
|
// attenuator: None,
|
||||||
|
// dds: [None, None, None, None],
|
||||||
|
// }
|
||||||
|
// }
|
||||||
|
|
||||||
|
// pub fn init(&'a mut self, f_ref_clks:[u64; 4]) {
|
||||||
|
// self.parts = Some(self.cpld.split());
|
||||||
|
// self.config_register = Some(ConfigRegister::new(self.parts.unwrap().spi1));
|
||||||
|
// self.attenuator = Some(Attenuator::new(self.parts.unwrap().spi2));
|
||||||
|
// self.dds[0] = Some(DDS::new(self.parts.unwrap().spi4, f_ref_clks[0]));
|
||||||
|
// self.dds[1] = Some(DDS::new(self.parts.unwrap().spi5, f_ref_clks[1]));
|
||||||
|
// self.dds[2] = Some(DDS::new(self.parts.unwrap().spi6, f_ref_clks[2]));
|
||||||
|
// self.dds[3] = Some(DDS::new(self.parts.unwrap().spi7, f_ref_clks[3]));
|
||||||
|
// }
|
||||||
|
// }
|
|
@ -3,7 +3,7 @@ use nb;
|
||||||
|
|
||||||
use heapless::{consts, Vec};
|
use heapless::{consts, Vec};
|
||||||
|
|
||||||
use stm32h7xx_hal::ethernet;
|
use stm32h7_ethernet as ethernet;
|
||||||
use smoltcp as net;
|
use smoltcp as net;
|
||||||
|
|
||||||
use cortex_m_semihosting::hprintln;
|
use cortex_m_semihosting::hprintln;
|
||||||
|
|
156
src/scpi.rs
156
src/scpi.rs
|
@ -7,7 +7,6 @@ use scpi::NumericValues;
|
||||||
|
|
||||||
use core::convert::{TryFrom, TryInto};
|
use core::convert::{TryFrom, TryInto};
|
||||||
use core::str;
|
use core::str;
|
||||||
use core::str::Utf8Error;
|
|
||||||
use scpi::ieee488::commands::*;
|
use scpi::ieee488::commands::*;
|
||||||
use scpi::scpi::commands::*;
|
use scpi::scpi::commands::*;
|
||||||
use scpi::{
|
use scpi::{
|
||||||
|
@ -32,12 +31,7 @@ use scpi::{
|
||||||
use embedded_hal::blocking::spi::Transfer;
|
use embedded_hal::blocking::spi::Transfer;
|
||||||
use cortex_m_semihosting::hprintln;
|
use cortex_m_semihosting::hprintln;
|
||||||
|
|
||||||
use crate::{
|
use crate::{Urukul, UrukulTraits, Error as UrukulError};
|
||||||
Urukul,
|
|
||||||
UrukulTraits,
|
|
||||||
Error as UrukulError,
|
|
||||||
ClockSource,
|
|
||||||
};
|
|
||||||
|
|
||||||
#[macro_export]
|
#[macro_export]
|
||||||
macro_rules! recursive_scpi_tree {
|
macro_rules! recursive_scpi_tree {
|
||||||
|
@ -62,7 +56,7 @@ macro_rules! recursive_scpi_tree {
|
||||||
};
|
};
|
||||||
|
|
||||||
// Handle optional header with sub-commands
|
// Handle optional header with sub-commands
|
||||||
([$header_name: expr] => {$($($rest: tt)=>*),*}) => {
|
([$header_name: expr] => {$($($rest: tt)=>*);*}) => {
|
||||||
Node {
|
Node {
|
||||||
name: str::as_bytes($header_name),
|
name: str::as_bytes($header_name),
|
||||||
handler: None,
|
handler: None,
|
||||||
|
@ -76,7 +70,7 @@ macro_rules! recursive_scpi_tree {
|
||||||
};
|
};
|
||||||
|
|
||||||
// Handle non-optional header with sub-commands
|
// Handle non-optional header with sub-commands
|
||||||
($header_name: expr => {$($($rest: tt)=>*),*}) => {
|
($header_name: expr => {$($($rest: tt)=>*);*}) => {
|
||||||
Node {
|
Node {
|
||||||
name: str::as_bytes($header_name),
|
name: str::as_bytes($header_name),
|
||||||
handler: None,
|
handler: None,
|
||||||
|
@ -92,7 +86,7 @@ macro_rules! recursive_scpi_tree {
|
||||||
|
|
||||||
#[macro_export]
|
#[macro_export]
|
||||||
macro_rules! scpi_root {
|
macro_rules! scpi_root {
|
||||||
($($($node: tt)=>*),*) => {
|
($($($node: tt)=>*);*) => {
|
||||||
&Node {
|
&Node {
|
||||||
name: b"ROOT",
|
name: b"ROOT",
|
||||||
optional: false,
|
optional: false,
|
||||||
|
@ -137,34 +131,31 @@ impl<T: Device> Command<T> for HelloWorldCommand {
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
pub struct Channel0SwitchCommand {}
|
macro_rules! declare_channel_commands {
|
||||||
pub struct Channel1SwitchCommand {}
|
($($header: ident),*) => {
|
||||||
pub struct Channel2SwitchCommand {}
|
mashup! {
|
||||||
pub struct Channel3SwitchCommand {}
|
$(
|
||||||
pub struct ClockSourceCommand {}
|
m["channel0" $header] = Channel0 $header Command;
|
||||||
pub struct ClockDivisionCommand {}
|
m["channel1" $header] = Channel1 $header Command;
|
||||||
|
m["channel2" $header] = Channel2 $header Command;
|
||||||
|
m["channel3" $header] = Channel3 $header Command;
|
||||||
|
)*
|
||||||
|
}
|
||||||
|
|
||||||
impl<T: Device + UrukulTraits> Command<T> for Channel0SwitchCommand {
|
m! {
|
||||||
nquery!();
|
$(
|
||||||
|
pub struct "channel0" $header {}
|
||||||
fn event(&self, context: &mut Context<T>, args: &mut Tokenizer) -> Result<()> {
|
pub struct "channel1" $header {}
|
||||||
match context.device.get_channel_switch_status(0) {
|
pub struct "channel2" $header {}
|
||||||
Ok(status) => {
|
pub struct "channel3" $header {}
|
||||||
let next_state: bool = match args.next_data(true) {
|
)*
|
||||||
Ok(Some(token)) => token.try_into()?,
|
}
|
||||||
Ok(None) => !status,
|
|
||||||
Err(_) => return Err(ErrorCode::IllegalParameterValue.into()),
|
|
||||||
};
|
};
|
||||||
match context.device.set_channel_switch(0, next_state) {
|
|
||||||
Ok(()) => Ok(()),
|
|
||||||
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
|
|
||||||
}
|
|
||||||
},
|
|
||||||
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
declare_channel_commands!(Switch);
|
||||||
|
|
||||||
|
// pub struct Channel1SwitchCommand {}
|
||||||
impl<T: Device + UrukulTraits> Command<T> for Channel1SwitchCommand {
|
impl<T: Device + UrukulTraits> Command<T> for Channel1SwitchCommand {
|
||||||
nquery!();
|
nquery!();
|
||||||
|
|
||||||
|
@ -178,6 +169,7 @@ impl<T: Device + UrukulTraits> Command<T> for Channel1SwitchCommand {
|
||||||
};
|
};
|
||||||
match context.device.set_channel_switch(1, next_state) {
|
match context.device.set_channel_switch(1, next_state) {
|
||||||
Ok(()) => Ok(()),
|
Ok(()) => Ok(()),
|
||||||
|
Err(T) => panic!("Switched an illegal channel!"),
|
||||||
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
|
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
|
@ -186,102 +178,6 @@ impl<T: Device + UrukulTraits> Command<T> for Channel1SwitchCommand {
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<T: Device + UrukulTraits> Command<T> for Channel2SwitchCommand {
|
|
||||||
nquery!();
|
|
||||||
|
|
||||||
fn event(&self, context: &mut Context<T>, args: &mut Tokenizer) -> Result<()> {
|
|
||||||
match context.device.get_channel_switch_status(2) {
|
|
||||||
Ok(status) => {
|
|
||||||
let next_state: bool = match args.next_data(true) {
|
|
||||||
Ok(Some(token)) => token.try_into()?,
|
|
||||||
Ok(None) => !status,
|
|
||||||
Err(_) => return Err(ErrorCode::IllegalParameterValue.into()),
|
|
||||||
};
|
|
||||||
match context.device.set_channel_switch(2, next_state) {
|
|
||||||
Ok(()) => Ok(()),
|
|
||||||
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
|
|
||||||
}
|
|
||||||
},
|
|
||||||
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
impl<T: Device + UrukulTraits> Command<T> for Channel3SwitchCommand {
|
|
||||||
nquery!();
|
|
||||||
|
|
||||||
fn event(&self, context: &mut Context<T>, args: &mut Tokenizer) -> Result<()> {
|
|
||||||
match context.device.get_channel_switch_status(3) {
|
|
||||||
Ok(status) => {
|
|
||||||
let next_state: bool = match args.next_data(true) {
|
|
||||||
Ok(Some(token)) => token.try_into()?,
|
|
||||||
Ok(None) => !status,
|
|
||||||
Err(_) => return Err(ErrorCode::IllegalParameterValue.into()),
|
|
||||||
};
|
|
||||||
match context.device.set_channel_switch(3, next_state) {
|
|
||||||
Ok(()) => Ok(()),
|
|
||||||
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
|
|
||||||
}
|
|
||||||
},
|
|
||||||
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
impl<T:Device + UrukulTraits> Command<T> for ClockSourceCommand {
|
|
||||||
nquery!();
|
|
||||||
|
|
||||||
fn event(&self, context: &mut Context<T>, args: &mut Tokenizer) -> Result<()> {
|
|
||||||
let data: &[u8] = match args.next_data(false)? {
|
|
||||||
Some(Token::CharacterProgramData(s)) => s,
|
|
||||||
_ => return Err(ErrorCode::IllegalParameterValue.into()),
|
|
||||||
};
|
|
||||||
let result = match str::from_utf8(data) {
|
|
||||||
Ok(str_param) => match str_param {
|
|
||||||
"OSC" => context.device.set_clock_source(ClockSource::OSC),
|
|
||||||
"MMCX" => context.device.set_clock_source(ClockSource::MMCX),
|
|
||||||
"SMA" => context.device.set_clock_source(ClockSource::SMA),
|
|
||||||
_ => return Err(ErrorCode::IllegalParameterValue.into()),
|
|
||||||
}
|
|
||||||
_ => return Err(ErrorCode::IllegalParameterValue.into()),
|
|
||||||
};
|
|
||||||
match result {
|
|
||||||
Ok(_) => Ok(()),
|
|
||||||
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
impl<T:Device + UrukulTraits> Command<T> for ClockDivisionCommand {
|
|
||||||
nquery!();
|
|
||||||
|
|
||||||
fn event(&self, context: &mut Context<T>, args: &mut Tokenizer) -> Result<()> {
|
|
||||||
let data :u8 = match args.next_data(false)? {
|
|
||||||
Some(token) => {
|
|
||||||
match f32::try_from(token) {
|
|
||||||
Ok(val) => {
|
|
||||||
hprintln!("{}", val).unwrap();
|
|
||||||
if val == 1.0 || val == 2.0 || val == 4.0 {
|
|
||||||
val as u8
|
|
||||||
} else {
|
|
||||||
return Err(ErrorCode::IllegalParameterValue.into())
|
|
||||||
}
|
|
||||||
},
|
|
||||||
Err(_e) => {
|
|
||||||
hprintln!("Checked numberic error").unwrap();
|
|
||||||
return Err(ErrorCode::IllegalParameterValue.into())
|
|
||||||
},
|
|
||||||
}
|
|
||||||
},
|
|
||||||
_ => return Err(ErrorCode::IllegalParameterValue.into()),
|
|
||||||
};
|
|
||||||
match context.device.set_clock_division(data) {
|
|
||||||
Ok(()) => Ok(()),
|
|
||||||
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Implement "Device" trait from SCPI
|
* Implement "Device" trait from SCPI
|
||||||
* TODO: Implement mandatory commands
|
* TODO: Implement mandatory commands
|
||||||
|
|
Loading…
Reference in New Issue