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4c88c31aca
...
37b7cc71b7
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@ -15,8 +15,8 @@ stm32h7xx-hal = {version = "0.6.0", features = [ "stm32h743v", "rt", "unproven"
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stm32h7-ethernet = { version = "0.2.0", features = [ "phy_lan8742a", "stm32h743v" ] }
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smoltcp = { version = "0.6.0", default-features = false, features = [ "ethernet", "proto-ipv4", "proto-ipv6", "socket-raw" ] }
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nb = "1.0.0"
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# scpi = { path = "../scpi-fork/scpi", version = "0.3.4" }
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scpi = { git = "https://github.com/occheung/scpi-rs", branch = "issue-4" }
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scpi = { path = "../scpi-fork/scpi", version = "0.3.4" }
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# scpi = { git = "https://github.com/occheung/scpi-rs", branch = "issue-4" }
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lexical-core = { version="0.7.1", features=["radix"], default-features=false }
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libm = "0.2.0"
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@ -76,7 +76,7 @@ use firmware::{
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cpld::{
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CPLD,
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},
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scpi::{ HelloWorldCommand, Channel1SwitchCommand },
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scpi::{ HelloWorldCommand, SwitchOnCommand },
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Urukul,
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};
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use scpi::prelude::*;
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@ -318,6 +318,25 @@ fn main() -> ! {
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//
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scpi_crate_version!(),
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//Test
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Node {
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name: b"ABORt",
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handler: None,
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optional: false,
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sub: &[],
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},
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Node {
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name: b"INITiate",
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handler: None,
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optional: false,
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sub: &[
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Node {
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name: b"IMMediate",
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handler: None,
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optional: true,
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sub: &[],
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}
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],
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},
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Node {
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name: b"EXAMple",
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optional: true,
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@ -338,19 +357,12 @@ fn main() -> ! {
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},
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],
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},
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Node {
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name: b"CHANNEL1",
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optional: false,
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handler: None,
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sub: &[
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Node {
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name: b"SWitch",
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optional: false,
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handler: Some(&Channel1SwitchCommand {}),
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handler: Some(&SwitchOnCommand {}),
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sub: &[],
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}
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],
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}
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];
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// Device was declared in prior
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@ -1,216 +0,0 @@
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#![no_std]
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#![no_main]
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use smoltcp as net;
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use stm32h7_ethernet as ethernet;
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use stm32h7xx_hal::{gpio::Speed, prelude::*, spi, pac};
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use embedded_hal::{blocking::spi::Transfer};
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use heapless::{consts, String};
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use cortex_m;
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use cortex_m_rt::{
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entry,
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exception,
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};
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use cortex_m_semihosting::hprintln;
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use panic_halt as _;
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use rtic::cyccnt::{Instant, U32Ext};
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use minimq::{
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embedded_nal::{IpAddr, Ipv4Addr, TcpStack, SocketAddr, Mode},
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MqttClient, QoS,
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};
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use firmware::nal_tcp_client::{NetworkStack, NetStorage, NetworkInterface};
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use firmware::{Urukul};
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use firmware::cpld::{CPLD};
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static mut NET_STORE: NetStorage = NetStorage {
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// Placeholder for the real IP address, which is initialized at runtime.
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ip_addrs: [net::wire::IpCidr::Ipv6(
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net::wire::Ipv6Cidr::SOLICITED_NODE_PREFIX,
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)],
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neighbor_cache: [None; 8],
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routes_cache: [None; 8],
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};
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#[link_section = ".sram3.eth"]
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static mut DES_RING: ethernet::DesRing = ethernet::DesRing::new();
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macro_rules! add_socket {
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($sockets:ident, $tx_storage:ident, $rx_storage:ident) => {
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let mut $rx_storage = [0; 4096];
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let mut $tx_storage = [0; 4096];
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let tcp_socket = {
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let tx_buffer = net::socket::TcpSocketBuffer::new(&mut $tx_storage[..]);
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let rx_buffer = net::socket::TcpSocketBuffer::new(&mut $rx_storage[..]);
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net::socket::TcpSocket::new(tx_buffer, rx_buffer)
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};
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let _handle = $sockets.add(tcp_socket);
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};
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}
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#[entry]
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fn main() -> ! {
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let mut cp = cortex_m::Peripherals::take().unwrap();
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let dp = pac::Peripherals::take().unwrap();
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cp.DWT.enable_cycle_counter();
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// Enable SRAM3 for the descriptor ring.
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dp.RCC.ahb2enr.modify(|_, w| w.sram3en().set_bit());
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let rcc = dp.RCC.constrain();
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let pwr = dp.PWR.constrain();
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let vos = pwr.freeze();
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let ccdr = rcc
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.sysclk(400.mhz())
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.hclk(200.mhz())
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.per_ck(100.mhz())
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.pll1_q_ck(48.mhz()) // for SPI
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.pll2_p_ck(100.mhz())
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.pll2_q_ck(100.mhz())
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.freeze(vos, &dp.SYSCFG);
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let gpioa = dp.GPIOA.split(ccdr.peripheral.GPIOA);
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let gpiob = dp.GPIOB.split(ccdr.peripheral.GPIOB);
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let gpioc = dp.GPIOC.split(ccdr.peripheral.GPIOC);
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let gpiod = dp.GPIOD.split(ccdr.peripheral.GPIOD);
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let gpioe = dp.GPIOE.split(ccdr.peripheral.GPIOE);
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let gpiof = dp.GPIOF.split(ccdr.peripheral.GPIOF);
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let gpiog = dp.GPIOG.split(ccdr.peripheral.GPIOG);
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// Configure ethernet IO
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{
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let _rmii_refclk = gpioa.pa1.into_alternate_af11().set_speed(Speed::VeryHigh);
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let _rmii_mdio = gpioa.pa2.into_alternate_af11().set_speed(Speed::VeryHigh);
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let _rmii_mdc = gpioc.pc1.into_alternate_af11().set_speed(Speed::VeryHigh);
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let _rmii_crs_dv = gpioa.pa7.into_alternate_af11().set_speed(Speed::VeryHigh);
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let _rmii_rxd0 = gpioc.pc4.into_alternate_af11().set_speed(Speed::VeryHigh);
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let _rmii_rxd1 = gpioc.pc5.into_alternate_af11().set_speed(Speed::VeryHigh);
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let _rmii_tx_en = gpiog.pg11.into_alternate_af11().set_speed(Speed::VeryHigh);
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let _rmii_txd0 = gpiog.pg13.into_alternate_af11().set_speed(Speed::VeryHigh);
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let _rmii_txd1 = gpiob.pb13.into_alternate_af11().set_speed(Speed::VeryHigh);
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}
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// Configure ethernet
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let mac_addr = net::wire::EthernetAddress([0xAC, 0x6F, 0x7A, 0xDE, 0xD6, 0xC8]);
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let (eth_dma, _eth_mac) = unsafe {
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ethernet::ethernet_init(
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dp.ETHERNET_MAC,
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dp.ETHERNET_MTL,
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dp.ETHERNET_DMA,
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&mut DES_RING,
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mac_addr.clone(),
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)
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};
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unsafe { ethernet::enable_interrupt() }
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let store = unsafe { &mut NET_STORE };
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store.ip_addrs[0] = net::wire::IpCidr::new(net::wire::IpAddress::v4(192, 168, 1, 200), 24);
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let neighbor_cache = net::iface::NeighborCache::new(&mut store.neighbor_cache[..]);
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let default_v4_gw = net::wire::Ipv4Address::new(192, 168, 1, 1);
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let mut routes = net::iface::Routes::new(&mut store.routes_cache[..]);
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routes.add_default_ipv4_route(default_v4_gw).unwrap();
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let mut net_interface = net::iface::EthernetInterfaceBuilder::new(eth_dma)
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.ethernet_addr(mac_addr)
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.neighbor_cache(neighbor_cache)
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.ip_addrs(&mut store.ip_addrs[..])
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// .routes(routes)
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.finalize();
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/*
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* Using SPI1, AF5
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* SCLK -> PA5
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* MOSI -> PB5
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* MISO -> PA6
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* CS -> 0: PB12, 1: PA15, 2: PC7
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* I/O_Update -> PB15
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*/
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let sclk = gpioa.pa5.into_alternate_af5();
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let mosi = gpiob.pb5.into_alternate_af5();
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let miso = gpioa.pa6.into_alternate_af5();
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let (cs0, cs1, cs2) = (
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gpiob.pb12.into_push_pull_output(),
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gpioa.pa15.into_push_pull_output(),
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gpioc.pc7.into_push_pull_output(),
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);
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let io_update = gpiob.pb15.into_push_pull_output();
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let spi = dp.SPI1.spi(
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(sclk, miso, mosi),
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spi::MODE_0,
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3.mhz(),
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ccdr.peripheral.SPI1,
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&ccdr.clocks,
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);
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let cpld = CPLD::new(spi, (cs0, cs1, cs2), io_update);
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let parts = cpld.split();
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let urukul = Urukul::new(
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parts.spi1, parts.spi2, parts.spi3, parts.spi4, parts.spi5, parts.spi6, parts.spi7,
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[25_000_000, 25_000_000, 25_000_000, 25_000_000]
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);
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cp.SCB.enable_icache();
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let mut time: u32 = 0;
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let mut next_ms = Instant::now();
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next_ms += 400_00.cycles();
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let mut socket_set_entries: [_; 8] = Default::default();
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let mut sockets = net::socket::SocketSet::new(&mut socket_set_entries[..]);
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add_socket!(sockets, rx_storage, tx_storage);
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let tcp_stack = NetworkStack::new(&mut net_interface, sockets);
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let mut client = MqttClient::<consts::U256, _>::new(
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IpAddr::V4(Ipv4Addr::new(192, 168, 1, 125)),
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"nucleo",
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tcp_stack,
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)
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.unwrap();
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loop {
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let tick = Instant::now() > next_ms;
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if tick {
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next_ms += 400_000.cycles();
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time += 1;
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}
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if tick && (time % 1000) == 0 {
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client
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.publish("nucleo", "Hello, World!".as_bytes(), QoS::AtMostOnce, &[])
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.unwrap();
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}
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client
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.poll(|_client, topic, message, _properties| match topic {
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_ => hprintln!("On '{:?}', received: {:?}", topic, message).unwrap(),
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})
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.unwrap();
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// Update the TCP stack.
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let sleep = client.network_stack.update(time);
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if sleep {
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//cortex_m::asm::wfi();
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cortex_m::asm::nop();
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}
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}
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}
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@ -1,135 +1,127 @@
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#![no_main]
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#![no_std]
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#![no_main]
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||||
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use core::sync::atomic::{AtomicU32, Ordering};
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use smoltcp as net;
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use stm32h7_ethernet as ethernet;
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use stm32h7xx_hal::{gpio::Speed, prelude::*, spi, pac};
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use embedded_hal::{blocking::spi::Transfer};
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// extern crate cortex_m;
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use panic_semihosting as _;
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use heapless::{consts, String};
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use cortex_m;
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use cortex_m::asm::nop;
|
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use cortex_m_rt::{
|
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entry,
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exception,
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||||
};
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use cortex_m_semihosting::hprintln;
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extern crate smoltcp;
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use panic_halt as _;
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// Ethernet crate for STM32H7 has been merged into HAL in the latest commit
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extern crate stm32h7_ethernet as ethernet;
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use rtic::cyccnt::{Instant, U32Ext};
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use stm32h7xx_hal::gpio::Speed;
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use stm32h7xx_hal::hal::digital::v2::{
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OutputPin,
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InputPin,
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use minimq::{
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embedded_nal::{IpAddr, Ipv4Addr},
|
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MqttClient, QoS,
|
||||
};
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use stm32h7xx_hal::rcc::CoreClocks;
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use stm32h7xx_hal::{pac, prelude::*, spi, stm32, stm32::interrupt};
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use Speed::*;
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use libm::round;
|
||||
use firmware::nal_tcp_client::{NetworkStack, NetStorage, NetworkInterface};
|
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use firmware::{Urukul};
|
||||
use firmware::cpld::{CPLD};
|
||||
|
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use core::{
|
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str,
|
||||
fmt::Write
|
||||
static mut NET_STORE: NetStorage = NetStorage {
|
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// Placeholder for the real IP address, which is initialized at runtime.
|
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ip_addrs: [net::wire::IpCidr::Ipv6(
|
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net::wire::Ipv6Cidr::SOLICITED_NODE_PREFIX,
|
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)],
|
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neighbor_cache: [None; 8],
|
||||
};
|
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use core::mem::uninitialized;
|
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|
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use smoltcp::wire::{EthernetAddress, IpAddress, IpCidr, Ipv4Address};
|
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use smoltcp::iface::{NeighborCache, EthernetInterfaceBuilder, Routes};
|
||||
use smoltcp::socket::SocketSet;
|
||||
use smoltcp::socket::{SocketHandle, TcpSocket, TcpSocketBuffer};
|
||||
use smoltcp::time::{Duration, Instant};
|
||||
|
||||
use embedded_nal::TcpStack;
|
||||
|
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use firmware;
|
||||
use firmware::{
|
||||
attenuator::Attenuator,
|
||||
config_register::{
|
||||
ConfigRegister,
|
||||
CFGMask,
|
||||
StatusMask,
|
||||
},
|
||||
dds::{
|
||||
DDS,
|
||||
DDSCFRMask,
|
||||
},
|
||||
cpld::{
|
||||
CPLD,
|
||||
},
|
||||
Urukul,
|
||||
};
|
||||
use scpi::prelude::*;
|
||||
|
||||
/// Configure SYSTICK for 1ms timebase
|
||||
fn systick_init(syst: &mut stm32::SYST, clocks: CoreClocks) {
|
||||
let c_ck_mhz = clocks.c_ck().0 / 1_000_000;
|
||||
|
||||
let syst_calib = 0x3E8;
|
||||
|
||||
syst.set_clock_source(cortex_m::peripheral::syst::SystClkSource::Core);
|
||||
syst.set_reload((syst_calib * c_ck_mhz) - 1);
|
||||
syst.enable_interrupt();
|
||||
syst.enable_counter();
|
||||
}
|
||||
|
||||
/// ======================================================================
|
||||
/// Entry point
|
||||
/// ======================================================================
|
||||
|
||||
/// TIME is an atomic u32 that counts milliseconds. Although not used
|
||||
/// here, it is very useful to have for network protocols
|
||||
static TIME: AtomicU32 = AtomicU32::new(0);
|
||||
|
||||
/// Locally administered MAC address
|
||||
const MAC_ADDRESS: [u8; 6] = [0x02, 0x00, 0x11, 0x22, 0x33, 0x44];
|
||||
|
||||
/// Ethernet descriptor rings are a global singleton
|
||||
#[link_section = ".sram3.eth"]
|
||||
static mut DES_RING: ethernet::DesRing = ethernet::DesRing::new();
|
||||
|
||||
// Theoratical maximum number of socket that can be handled
|
||||
const SOCKET_COUNT: usize = 2;
|
||||
macro_rules! add_socket {
|
||||
($sockets:ident, $tx_storage:ident, $rx_storage:ident) => {
|
||||
let mut $rx_storage = [0; 4096];
|
||||
let mut $tx_storage = [0; 4096];
|
||||
|
||||
// Give buffer sizes of transmitting and receiving TCP packets
|
||||
const BUFFER_SIZE: usize = 2048;
|
||||
let tcp_socket = {
|
||||
let tx_buffer = net::socket::TcpSocketBuffer::new(&mut $tx_storage[..]);
|
||||
let rx_buffer = net::socket::TcpSocketBuffer::new(&mut $rx_storage[..]);
|
||||
|
||||
net::socket::TcpSocket::new(tx_buffer, rx_buffer)
|
||||
};
|
||||
|
||||
let _handle = $sockets.add(tcp_socket);
|
||||
};
|
||||
}
|
||||
|
||||
pub type UrukulType = Urukul<
|
||||
firmware::spi_slave::SPISlave<
|
||||
'static,
|
||||
firmware::cpld::CPLD<
|
||||
stm32h7xx_hal::spi::Spi<stm32h7xx_hal::device::SPI1>,
|
||||
stm32h7xx_hal::gpio::gpiob::PB12<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
|
||||
stm32h7xx_hal::gpio::gpioa::PA15<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
|
||||
stm32h7xx_hal::gpio::gpioc::PC7<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
|
||||
stm32h7xx_hal::gpio::gpiob::PB15<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>
|
||||
>,
|
||||
stm32h7xx_hal::spi::Spi<stm32h7xx_hal::device::SPI1>,
|
||||
stm32h7xx_hal::gpio::gpiob::PB12<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
|
||||
stm32h7xx_hal::gpio::gpioa::PA15<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
|
||||
stm32h7xx_hal::gpio::gpioc::PC7<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
|
||||
stm32h7xx_hal::gpio::gpiob::PB15<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>
|
||||
>
|
||||
>;
|
||||
|
||||
pub type CPLDType = CPLD<
|
||||
stm32h7xx_hal::spi::Spi<stm32h7xx_hal::device::SPI1>,
|
||||
stm32h7xx_hal::gpio::gpiob::PB12<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
|
||||
stm32h7xx_hal::gpio::gpioa::PA15<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
|
||||
stm32h7xx_hal::gpio::gpioc::PC7<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
|
||||
stm32h7xx_hal::gpio::gpiob::PB15<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>
|
||||
>;
|
||||
|
||||
pub type IoUpdateType = stm32h7xx_hal::gpio::gpiob::PB15<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>;
|
||||
pub type SpiType = stm32h7xx_hal::spi::Spi<stm32h7xx_hal::device::SPI1, u8>;
|
||||
pub type PartsType = firmware::spi_slave::Parts<
|
||||
'static,
|
||||
firmware::cpld::CPLD<
|
||||
stm32h7xx_hal::spi::Spi<stm32h7xx_hal::device::SPI1>,
|
||||
stm32h7xx_hal::gpio::gpiob::PB12<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
|
||||
stm32h7xx_hal::gpio::gpioa::PA15<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
|
||||
stm32h7xx_hal::gpio::gpioc::PC7<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
|
||||
stm32h7xx_hal::gpio::gpiob::PB15<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>
|
||||
>,
|
||||
stm32h7xx_hal::spi::Spi<stm32h7xx_hal::device::SPI1>,
|
||||
stm32h7xx_hal::gpio::gpiob::PB12<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
|
||||
stm32h7xx_hal::gpio::gpioa::PA15<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
|
||||
stm32h7xx_hal::gpio::gpioc::PC7<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>,
|
||||
stm32h7xx_hal::gpio::gpiob::PB15<stm32h7xx_hal::gpio::Output<stm32h7xx_hal::gpio::PushPull>>
|
||||
>;
|
||||
|
||||
// the program entry point
|
||||
#[entry]
|
||||
fn main() -> ! {
|
||||
|
||||
let mut cp = cortex_m::Peripherals::take().unwrap();
|
||||
let dp = pac::Peripherals::take().unwrap();
|
||||
|
||||
// Initialise power...
|
||||
cp.DWT.enable_cycle_counter();
|
||||
|
||||
// Enable SRAM3 for the descriptor ring.
|
||||
dp.RCC.ahb2enr.modify(|_, w| w.sram3en().set_bit());
|
||||
|
||||
let rcc = dp.RCC.constrain();
|
||||
let pwr = dp.PWR.constrain();
|
||||
let vos = pwr.freeze();
|
||||
|
||||
// Initialise SRAM3
|
||||
dp.RCC.ahb2enr.modify(|_, w| w.sram3en().set_bit());
|
||||
|
||||
// Initialise clocks...
|
||||
let rcc = dp.RCC.constrain();
|
||||
let ccdr = rcc
|
||||
.sys_ck(200.mhz())
|
||||
.sysclk(400.mhz())
|
||||
.hclk(200.mhz())
|
||||
.pll1_r_ck(100.mhz()) // for TRACECK
|
||||
.per_ck(100.mhz())
|
||||
.pll1_q_ck(48.mhz()) // for SPI
|
||||
.pll2_p_ck(100.mhz())
|
||||
.pll2_q_ck(100.mhz())
|
||||
.freeze(vos, &dp.SYSCFG);
|
||||
|
||||
// Get the delay provider.
|
||||
let delay = cp.SYST.delay(ccdr.clocks);
|
||||
|
||||
// Initialise system...
|
||||
cp.SCB.invalidate_icache();
|
||||
cp.SCB.enable_icache();
|
||||
// TODO: ETH DMA coherence issues
|
||||
// cp.SCB.enable_dcache(&mut cp.CPUID);
|
||||
cp.DWT.enable_cycle_counter();
|
||||
|
||||
// Initialise IO...
|
||||
let gpioa = dp.GPIOA.split(ccdr.peripheral.GPIOA);
|
||||
let gpiob = dp.GPIOB.split(ccdr.peripheral.GPIOB);
|
||||
let gpioc = dp.GPIOC.split(ccdr.peripheral.GPIOC);
|
||||
|
@ -137,45 +129,66 @@ fn main() -> ! {
|
|||
let gpioe = dp.GPIOE.split(ccdr.peripheral.GPIOE);
|
||||
let gpiof = dp.GPIOF.split(ccdr.peripheral.GPIOF);
|
||||
let gpiog = dp.GPIOG.split(ccdr.peripheral.GPIOG);
|
||||
// let mut link_led = gpiob.pb0.into_push_pull_output(); // LED1, green
|
||||
// let mut status_led = gpioe.pe1.into_push_pull_output(); // LD2, yellow
|
||||
// let mut listen_led = gpiob.pb14.into_push_pull_output(); // LD3, red
|
||||
// link_led.set_low().ok();
|
||||
// status_led.set_low().ok();
|
||||
// listen_led.set_low().ok();
|
||||
|
||||
// Setup CDONE for checking
|
||||
let fpga_cdone = gpiod.pd15.into_pull_up_input();
|
||||
// Configure ethernet IO
|
||||
{
|
||||
let _rmii_refclk = gpioa.pa1.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_mdio = gpioa.pa2.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_mdc = gpioc.pc1.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_crs_dv = gpioa.pa7.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_rxd0 = gpioc.pc4.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_rxd1 = gpioc.pc5.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_tx_en = gpiog.pg11.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_txd0 = gpiog.pg13.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
let _rmii_txd1 = gpiob.pb13.into_alternate_af11().set_speed(Speed::VeryHigh);
|
||||
}
|
||||
|
||||
match fpga_cdone.is_high() {
|
||||
Ok(true) => hprintln!("FPGA is ready."),
|
||||
Ok(_) => hprintln!("FPGA is in reset state."),
|
||||
Err(_) => hprintln!("Error: Cannot read C_DONE"),
|
||||
}.unwrap();
|
||||
// Configure ethernet
|
||||
let mut net_interface = {
|
||||
let mac_addr = net::wire::EthernetAddress([0xAC, 0x6F, 0x7A, 0xDE, 0xD6, 0xC8]);
|
||||
let (eth_dma, _eth_mac) = unsafe {
|
||||
ethernet::ethernet_init(
|
||||
dp.ETHERNET_MAC,
|
||||
dp.ETHERNET_MTL,
|
||||
dp.ETHERNET_DMA,
|
||||
&mut DES_RING,
|
||||
mac_addr.clone(),
|
||||
)
|
||||
};
|
||||
|
||||
unsafe { ethernet::enable_interrupt() }
|
||||
|
||||
let store = unsafe { &mut NET_STORE };
|
||||
|
||||
store.ip_addrs[0] = net::wire::IpCidr::new(net::wire::IpAddress::v4(192, 168, 1, 200), 24);
|
||||
|
||||
let neighbor_cache = net::iface::NeighborCache::new(&mut store.neighbor_cache[..]);
|
||||
|
||||
net::iface::EthernetInterfaceBuilder::new(eth_dma)
|
||||
.ethernet_addr(mac_addr)
|
||||
.neighbor_cache(neighbor_cache)
|
||||
.ip_addrs(&mut store.ip_addrs[..])
|
||||
.finalize()
|
||||
};
|
||||
|
||||
// Setup Urukul
|
||||
/*
|
||||
* Using SPI1, AF5
|
||||
* SCLK -> PA5
|
||||
* MOSI -> PB5
|
||||
* MISO -> PA6
|
||||
* CS -> 0: PB12, 1: PA15, 2: PC7
|
||||
* I/O_Update -> PB15
|
||||
*/
|
||||
|
||||
let sclk = gpioa.pa5.into_alternate_af5();
|
||||
let mosi = gpiob.pb5.into_alternate_af5();
|
||||
let miso = gpioa.pa6.into_alternate_af5();
|
||||
|
||||
|
||||
let (cs0, cs1, cs2) = (
|
||||
gpiob.pb12.into_push_pull_output(),
|
||||
gpioa.pa15.into_push_pull_output(),
|
||||
gpioc.pc7.into_push_pull_output(),
|
||||
);
|
||||
|
||||
/*
|
||||
* I/O_Update -> PB15
|
||||
*/
|
||||
let io_update = gpiob.pb15.into_push_pull_output();
|
||||
|
||||
let spi = dp.SPI1.spi(
|
||||
|
@ -186,201 +199,63 @@ fn main() -> ! {
|
|||
&ccdr.clocks,
|
||||
);
|
||||
|
||||
let switch = CPLD::new(spi, (cs0, cs1, cs2), io_update);
|
||||
let parts = switch.split();
|
||||
let mut urukul = Urukul::new(
|
||||
let cpld = CPLD::new(spi, (cs0, cs1, cs2), io_update);
|
||||
let parts = cpld.split();
|
||||
|
||||
let urukul = Urukul::new(
|
||||
parts.spi1, parts.spi2, parts.spi3, parts.spi4, parts.spi5, parts.spi6, parts.spi7,
|
||||
[25_000_000, 25_000_000, 25_000_000, 25_000_000]
|
||||
);
|
||||
|
||||
// Setup ethernet pins
|
||||
setup_ethernet_pins(
|
||||
gpioa.pa1, gpioa.pa2, gpioc.pc1, gpioa.pa7, gpioc.pc4,
|
||||
gpioc.pc5, gpiog.pg11, gpiog.pg13, gpiob.pb13
|
||||
);
|
||||
cp.SCB.enable_icache();
|
||||
|
||||
// Initialise ethernet...
|
||||
assert_eq!(ccdr.clocks.hclk().0, 200_000_000); // HCLK 200MHz
|
||||
assert_eq!(ccdr.clocks.pclk1().0, 100_000_000); // PCLK 100MHz
|
||||
assert_eq!(ccdr.clocks.pclk2().0, 100_000_000); // PCLK 100MHz
|
||||
assert_eq!(ccdr.clocks.pclk4().0, 100_000_000); // PCLK 100MHz
|
||||
let mut time: u32 = 0;
|
||||
let mut next_ms = Instant::now();
|
||||
|
||||
let mac_addr = smoltcp::wire::EthernetAddress::from_bytes(&MAC_ADDRESS);
|
||||
let (_eth_dma, mut eth_mac) = unsafe {
|
||||
ethernet::ethernet_init(
|
||||
dp.ETHERNET_MAC,
|
||||
dp.ETHERNET_MTL,
|
||||
dp.ETHERNET_DMA,
|
||||
&mut DES_RING,
|
||||
mac_addr.clone(),
|
||||
next_ms += 400_00.cycles();
|
||||
|
||||
let mut socket_set_entries: [_; 8] = Default::default();
|
||||
let mut sockets = net::socket::SocketSet::new(&mut socket_set_entries[..]);
|
||||
add_socket!(sockets, rx_storage, tx_storage);
|
||||
|
||||
let tcp_stack = NetworkStack::new(&mut net_interface, sockets);
|
||||
let mut client = MqttClient::<consts::U256, _>::new(
|
||||
IpAddr::V4(Ipv4Addr::new(192, 168, 1, 125)),
|
||||
"nucleo",
|
||||
tcp_stack,
|
||||
)
|
||||
};
|
||||
unsafe {
|
||||
ethernet::enable_interrupt();
|
||||
cp.NVIC.set_priority(stm32::Interrupt::ETH, 196); // Mid prio
|
||||
cortex_m::peripheral::NVIC::unmask(stm32::Interrupt::ETH);
|
||||
}
|
||||
|
||||
// ----------------------------------------------------------
|
||||
// Begin periodic tasks
|
||||
|
||||
systick_init(&mut delay.free(), ccdr.clocks);
|
||||
unsafe {
|
||||
cp.SCB.shpr[15 - 4].write(128);
|
||||
} // systick exception priority
|
||||
|
||||
// ----------------------------------------------------------
|
||||
// Main application loop
|
||||
|
||||
// Setup addresses, maybe not MAC?
|
||||
// MAC is set up in prior
|
||||
let local_addr = IpAddress::v4(192, 168, 1, 200);
|
||||
let mut ip_addrs = [IpCidr::new(local_addr, 24)];
|
||||
|
||||
// let neighbor_cache = NeighborCache::new(BTreeMap::new());
|
||||
let mut neighbor_storage = [None; 16];
|
||||
let neighbor_cache = NeighborCache::new(&mut neighbor_storage[..]);
|
||||
|
||||
// Routes
|
||||
let default_v4_gw = Ipv4Address::new(192, 168, 1, 1);
|
||||
let mut routes_storage = [None; 8];
|
||||
let mut routes = Routes::new(&mut routes_storage[..]);
|
||||
routes.add_default_ipv4_route(default_v4_gw).unwrap();
|
||||
|
||||
// Device? _eth_dma, as it implements phy::device
|
||||
let mut iface = EthernetInterfaceBuilder::new(_eth_dma)
|
||||
.ethernet_addr(mac_addr)
|
||||
.neighbor_cache(neighbor_cache)
|
||||
.ip_addrs(&mut ip_addrs[..])
|
||||
.routes(routes)
|
||||
.finalize();
|
||||
|
||||
// SCPI configs
|
||||
// Device was declared in prior
|
||||
|
||||
// let mut errors = ArrayErrorQueue::<[Error; 10]>::new();
|
||||
// let mut context = Context::new(&mut urukul, &mut errors, TREE);
|
||||
|
||||
// //Response bytebuffer
|
||||
// let mut buf = ArrayVecFormatter::<[u8; 256]>::new();
|
||||
|
||||
// SCPI configs END
|
||||
|
||||
// TCP socket
|
||||
let server_socket = {
|
||||
static mut server_rx_storage :[u8; BUFFER_SIZE] = [0; BUFFER_SIZE];
|
||||
static mut server_tx_storage :[u8; BUFFER_SIZE] = [0; BUFFER_SIZE];
|
||||
let server_rx_buffer = TcpSocketBuffer::new( unsafe { &mut server_rx_storage[..] } );
|
||||
let server_tx_buffer = TcpSocketBuffer::new( unsafe { &mut server_tx_storage[..] } );
|
||||
TcpSocket::new(server_rx_buffer, server_tx_buffer)
|
||||
};
|
||||
|
||||
// Setup a silent socket
|
||||
let client_socket = {
|
||||
static mut client_rx_storage :[u8; BUFFER_SIZE] = [0; BUFFER_SIZE];
|
||||
static mut client_tx_storage :[u8; BUFFER_SIZE] = [0; BUFFER_SIZE];
|
||||
let client_rx_buffer = TcpSocketBuffer::new( unsafe { &mut client_rx_storage[..] } );
|
||||
let client_tx_buffer = TcpSocketBuffer::new( unsafe { &mut client_tx_storage[..] } );
|
||||
TcpSocket::new(client_rx_buffer, client_tx_buffer)
|
||||
};
|
||||
|
||||
// Socket storage
|
||||
let mut sockets_storage: [_; 2] = Default::default();
|
||||
|
||||
let mut socket_set = SocketSet::new(&mut sockets_storage[..]);
|
||||
let server_handle = socket_set.add(server_socket);
|
||||
let client_handle = socket_set.add(client_socket);
|
||||
.unwrap();
|
||||
|
||||
loop {
|
||||
let _time = TIME.load(Ordering::Relaxed);
|
||||
match iface.poll(&mut socket_set, Instant::from_millis(_time as i64)) {
|
||||
Ok(_) => {
|
||||
// hprintln!("Ethernet up").unwrap();
|
||||
},
|
||||
Err(e) => {
|
||||
hprintln!("Ethernet down!").unwrap();
|
||||
},
|
||||
};
|
||||
let tick = Instant::now() > next_ms;
|
||||
|
||||
// Conenct to TCP server through port 49500
|
||||
{
|
||||
let mut socket = socket_set.get::<TcpSocket>(server_handle);
|
||||
if !socket.is_active() && !socket.is_listening(){
|
||||
socket.listen(7777).unwrap();
|
||||
hprintln!("Server listening").unwrap();
|
||||
if tick {
|
||||
next_ms += 400_000.cycles();
|
||||
time += 1;
|
||||
}
|
||||
|
||||
// hprintln!("listener state :{}", socket.state()).unwrap();
|
||||
|
||||
if socket.can_recv() {
|
||||
hprintln!("{:?}", str::from_utf8(socket.recv(|data| {
|
||||
(data.len(), data)
|
||||
}).unwrap()).unwrap()).unwrap();
|
||||
}
|
||||
if tick && (time % 1000) == 0 {
|
||||
client
|
||||
.publish("nucleo", "Hello, World!".as_bytes(), QoS::AtMostOnce, &[])
|
||||
.unwrap();
|
||||
}
|
||||
|
||||
{
|
||||
let mut socket = socket_set.get::<TcpSocket>(client_handle);
|
||||
if !socket.is_open() || !socket.can_send() {
|
||||
socket.abort();
|
||||
socket.close();
|
||||
// hprintln!("reset state: {}", socket.state()).unwrap();
|
||||
socket.connect((IpAddress::v4(192, 168, 1, 200), 1883),
|
||||
(IpAddress::Unspecified, 45000)).unwrap();
|
||||
// hprintln!("post connect state: {}", socket.state()).unwrap();
|
||||
client
|
||||
.poll(|_client, topic, message, _properties| match topic {
|
||||
_ => hprintln!("On '{:?}', received: {:?}", topic, message).unwrap(),
|
||||
})
|
||||
.unwrap();
|
||||
|
||||
// Update the TCP stack.
|
||||
let sleep = client.network_stack.update(time);
|
||||
if sleep {
|
||||
//cortex_m::asm::wfi();
|
||||
cortex_m::asm::nop();
|
||||
}
|
||||
|
||||
// hprintln!("client state: {}", socket.state()).unwrap();
|
||||
|
||||
if socket.can_send() {
|
||||
socket.send_slice(b"regards from socket").unwrap();
|
||||
match client.is_connected() {
|
||||
true => hprintln!("Connected"),
|
||||
false => hprintln!("No Connection"),
|
||||
}.unwrap();
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
use stm32h7xx_hal::gpio::{
|
||||
gpioa::{PA1, PA2, PA7},
|
||||
gpiob::{PB13},
|
||||
gpioc::{PC1, PC4, PC5},
|
||||
gpiog::{PG11, PG13},
|
||||
Speed::VeryHigh,
|
||||
};
|
||||
|
||||
/*
|
||||
* Migrated ethernet setup pins
|
||||
*/
|
||||
pub fn setup_ethernet_pins<REF_CLK, MDIO, MDC, CRS_DV, RXD0, RXD1, TX_EN, TXD0, TXD1>(
|
||||
pa1: PA1<REF_CLK>, pa2: PA2<MDIO>, pc1: PC1<MDC>, pa7: PA7<CRS_DV>, pc4: PC4<RXD0>,
|
||||
pc5: PC5<RXD1>, pg11: PG11<TX_EN>, pg13: PG13<TXD0>, pb13: PB13<TXD1>
|
||||
) {
|
||||
pa1.into_alternate_af11().set_speed(VeryHigh);
|
||||
pa2.into_alternate_af11().set_speed(VeryHigh);
|
||||
pc1.into_alternate_af11().set_speed(VeryHigh);
|
||||
pa7.into_alternate_af11().set_speed(VeryHigh);
|
||||
pc4.into_alternate_af11().set_speed(VeryHigh);
|
||||
pc5.into_alternate_af11().set_speed(VeryHigh);
|
||||
pg11.into_alternate_af11().set_speed(VeryHigh);
|
||||
pg13.into_alternate_af11().set_speed(VeryHigh);
|
||||
pb13.into_alternate_af11().set_speed(VeryHigh);
|
||||
}
|
||||
|
||||
#[interrupt]
|
||||
fn ETH() {
|
||||
unsafe { ethernet::interrupt_handler() }
|
||||
}
|
||||
|
||||
#[exception]
|
||||
fn SysTick() {
|
||||
TIME.fetch_add(1, Ordering::Relaxed);
|
||||
}
|
||||
|
||||
#[exception]
|
||||
fn HardFault(ef: &cortex_m_rt::ExceptionFrame) -> ! {
|
||||
panic!("HardFault at {:#?}", ef);
|
||||
}
|
||||
|
||||
#[exception]
|
||||
fn DefaultHandler(irqn: i16) {
|
||||
panic!("Unhandled exception (IRQn = {})", irqn);
|
||||
}
|
||||
|
|
46
src/lib.rs
46
src/lib.rs
|
@ -53,7 +53,6 @@ pub enum Error<E> {
|
|||
DDSError,
|
||||
ConfigRegisterError,
|
||||
DDSCLKError,
|
||||
ParameterError,
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -143,8 +142,7 @@ where
|
|||
|
||||
pub trait UrukulTraits {
|
||||
type Error;
|
||||
fn get_channel_switch_status(&mut self, channel: u32) -> Result<bool, Self::Error>;
|
||||
fn set_channel_switch(&mut self, channel: u32, status: bool) -> Result<(), Self::Error>;
|
||||
fn switch(&mut self, channel: u32) -> Result<(), Self::Error>;
|
||||
}
|
||||
|
||||
impl<SPI, E> UrukulTraits for Urukul<SPI>
|
||||
|
@ -153,52 +151,20 @@ where
|
|||
{
|
||||
type Error = Error<E>;
|
||||
|
||||
fn get_channel_switch_status(&mut self, channel: u32) -> Result<bool, Self::Error> {
|
||||
if channel < 4 {
|
||||
match self.config_register.get_status(StatusMask::RF_SW) {
|
||||
Ok(val) => Ok((val & (1 << channel)) != 0),
|
||||
Err(_e) => Err(_e),
|
||||
}
|
||||
} else {
|
||||
Err(Error::ParameterError)
|
||||
}
|
||||
}
|
||||
fn switch(&mut self, channel: u32) -> Result<(), Self::Error>{
|
||||
if channel < 16 {
|
||||
let switch_set = channel | u32::from(self.config_register.get_status(StatusMask::RF_SW)?);
|
||||
|
||||
fn set_channel_switch(&mut self, channel: u32, status: bool) -> Result<(), Self::Error> {
|
||||
if channel < 4 {
|
||||
let prev = u32::from(self.config_register.get_status(StatusMask::RF_SW)?);
|
||||
let next = {
|
||||
if status {
|
||||
prev | (1 << channel)
|
||||
} else {
|
||||
prev & (!(1 << channel))
|
||||
}
|
||||
};
|
||||
match self.config_register.set_configurations(&mut [
|
||||
(CFGMask::RF_SW, next),
|
||||
(CFGMask::RF_SW, switch_set),
|
||||
]) {
|
||||
Ok(_) => Ok(()),
|
||||
Err(_e) => Err(_e),
|
||||
}
|
||||
} else {
|
||||
Err(Error::ParameterError)
|
||||
Err(Error::ConfigRegisterError)
|
||||
}
|
||||
}
|
||||
|
||||
// fn switch_on(&mut self, channel: u32) -> Result<(), Self::Error>{
|
||||
// if channel < 16 {
|
||||
// let switch_set = channel | u32::from(self.config_register.get_status(StatusMask::RF_SW)?);
|
||||
|
||||
// match self.config_register.set_configurations(&mut [
|
||||
// (CFGMask::RF_SW, switch_set),
|
||||
// ]) {
|
||||
// Ok(_) => Ok(()),
|
||||
// Err(_e) => Err(_e),
|
||||
// }
|
||||
// } else {
|
||||
// Err(Error::ParameterError)
|
||||
// }
|
||||
// }
|
||||
}
|
||||
|
||||
// /*
|
||||
|
|
|
@ -21,7 +21,6 @@ pub enum NetworkError {
|
|||
pub struct NetStorage {
|
||||
pub ip_addrs: [net::wire::IpCidr; 1],
|
||||
pub neighbor_cache: [Option<(net::wire::IpAddress, net::iface::Neighbor)>; 8],
|
||||
pub routes_cache: [Option<(net::wire::IpCidr, net::iface::Route)>; 8],
|
||||
}
|
||||
|
||||
pub type NetworkInterface =
|
||||
|
|
45
src/scpi.rs
45
src/scpi.rs
|
@ -31,7 +31,7 @@ use scpi::{
|
|||
use embedded_hal::blocking::spi::Transfer;
|
||||
use cortex_m_semihosting::hprintln;
|
||||
|
||||
use crate::{Urukul, UrukulTraits, Error as UrukulError};
|
||||
use crate::{Urukul, UrukulTraits};
|
||||
|
||||
// pub struct MyDevice;
|
||||
|
||||
|
@ -49,38 +49,39 @@ impl<T: Device> Command<T> for HelloWorldCommand {
|
|||
}
|
||||
}
|
||||
|
||||
pub struct Channel1SwitchCommand {}
|
||||
impl<T: Device + UrukulTraits> Command<T> for Channel1SwitchCommand {
|
||||
pub struct SwitchOnCommand {}
|
||||
impl<T: Device + UrukulTraits> Command<T> for SwitchOnCommand {
|
||||
nquery!();
|
||||
|
||||
fn event(&self, context: &mut Context<T>, args: &mut Tokenizer) -> Result<()> {
|
||||
match context.device.get_channel_switch_status(1) {
|
||||
Ok(status) => {
|
||||
let next_state: bool = match args.next_data(true) {
|
||||
Ok(Some(token)) => token.try_into()?,
|
||||
Ok(None) => !status,
|
||||
let mut channel :u32 = 0;
|
||||
let mut channel_index = 0;
|
||||
while true {
|
||||
match args.next_data(channel_index != 0) {
|
||||
Ok(Some(token)) => {
|
||||
match u32::try_from(token) {
|
||||
Ok(shift) => {
|
||||
if shift >= 4 {
|
||||
return Err(ErrorCode::IllegalParameterValue.into());
|
||||
}
|
||||
channel |= (1 << shift);
|
||||
},
|
||||
Err(_) => return Err(ErrorCode::IllegalParameterValue.into()),
|
||||
};
|
||||
match context.device.set_channel_switch(1, next_state) {
|
||||
Ok(()) => Ok(()),
|
||||
Err(T) => panic!("Switched an illegal channel!"),
|
||||
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
|
||||
}
|
||||
},
|
||||
Ok(None) => break,
|
||||
Ok(_) => return Err(ErrorCode::MissingParameter.into()),
|
||||
Err(_e) => return Err(_e),
|
||||
};
|
||||
channel_index += 1;
|
||||
}
|
||||
match context.device.switch(channel) {
|
||||
Ok(()) => Ok(()),
|
||||
Err(_) => Err(Error::new(ErrorCode::HardwareError)),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// pub struct SwitchCnannelCommand {}
|
||||
// impl<T: Device + UrukulTraits> Command<T> for SwitchChannelCommand {
|
||||
// nquery!();
|
||||
|
||||
// fn event(&self, context: &mut Context<T>, args: &mut Tokenizer) -> Result<()> {
|
||||
|
||||
// }
|
||||
// }
|
||||
|
||||
/*
|
||||
* Implement "Device" trait from SCPI
|
||||
* TODO: Implement mandatory commands
|
||||
|
|
Loading…
Reference in New Issue