Commit Graph

223 Commits (master)

Author SHA1 Message Date
Etienne Wodey 73e40ace0e Add and apply pre-commit config (basic fixers, rustfmt) 2024-04-25 09:55:51 +02:00
Etienne Wodey 713545535e Apply rustfmt 2024-04-25 09:55:51 +02:00
Etienne Wodey 65e280670a Add rustup toolchain file 2024-04-25 09:55:09 +08:00
Etienne Wodey 6212ed09ea fpga: allow selecting the Humpback EEM port 2024-04-24 14:16:19 +02:00
Sébastien Bourdeauducq 4dabb16b4e add license 2024-04-23 18:18:52 +08:00
mwojcik aaa29a73ba Add nix flakes support (#2)
Reviewed-on: #2
Co-authored-by: mwojcik <mw@m-labs.hk>
Co-committed-by: mwojcik <mw@m-labs.hk>
2022-01-25 10:13:35 +08:00
occheung 54b87d0b36 actually update cargosha256 2021-01-29 17:19:14 +08:00
occheung dd70e2f106 update cargosha256 2021-01-29 16:59:14 +08:00
occheung 7729362d52 dds: add ram control 2021-01-29 16:47:28 +08:00
occheung d0d475bfbf cargo: update as SaiTLS 2021-01-29 16:46:07 +08:00
occheung 49c5fec30f Bug fixes:
+ Manage I/O Update pulse width.
- Remove retry-till-success PLL setup.
* Filter away unused bit in ASF when reading from DDS
* Reduce log from SPI
2021-01-27 15:56:46 +08:00
occheung fc1fedf890 main: incoporate alloc, tls, and flash 2020-12-18 17:46:56 +08:00
occheung 3b4a81eceb fix itm 2020-12-18 17:45:58 +08:00
occheung 04c0fa4074 flash_mem: alloc 2020-12-18 17:45:42 +08:00
occheung 8ce3200b5d flash_gen: fix endianness 2020-12-18 17:44:38 +08:00
occheung f1069d951d urukul: failsave for PLL timeout 2020-12-18 17:43:59 +08:00
occheung adc5807ff1 mqtt: support sfkv 2020-12-18 17:42:26 +08:00
occheung d5f9480645 sfkv: init 2020-12-18 17:39:45 +08:00
occheung 2e86838a22 nal: emigrate to tls 2020-12-18 17:39:24 +08:00
occheung 19ea898c31 nal: migrate to tls 2020-12-18 17:38:58 +08:00
occheung 68d58857cf flash: init abstraction 2020-12-18 17:37:56 +08:00
occheung d6fdc36c78 add sfkv, tls dependencies 2020-12-18 17:37:11 +08:00
occheung eafd26bbc5 Merge branch 'master' of https://git.m-labs.hk/occheung/firmware-development 2020-10-08 15:03:05 +08:00
Sebastien Bourdeauducq 82a18430dd update cargosha256 2020-10-08 14:42:52 +08:00
occheung 3252dfcd42 readme: fix slash 2020-10-06 15:12:12 +08:00
occheung 52986e214f flash: fix flash read 2020-10-06 15:03:53 +08:00
occheung 7e09318919 nix: simplify 2020-10-06 15:02:49 +08:00
occheung 5fd7f36c65 flash: generate bin thru py 2020-10-06 15:01:04 +08:00
occheung 468ffa4e15 readme: add CI & elf binary download 2020-10-05 15:35:45 +08:00
occheung 3fb8114df1 flash: setup flash memory for ip/mac/name setup 2020-10-05 15:20:54 +08:00
occheung 28046a8740 memory: shrink flash size for flash memory 2020-10-05 15:19:06 +08:00
occheung 41d3df26f2 mqtt_mux: profile independent output 2020-09-30 16:43:39 +08:00
occheung f8ccb66077 dds: fix return type 2020-09-30 16:42:54 +08:00
occheung d202886753 nix: simplify 2020-09-30 15:57:46 +08:00
occheung 430fc12f54 mqtt_mux: elaborate process error 2020-09-30 15:57:33 +08:00
occheung b577c8b715 dds: strictly enforce ~lsb_first and sdio_input_only 2020-09-30 15:57:06 +08:00
occheung 9d49afa5a8 readme: tiny format change 2020-09-29 17:05:11 +08:00
occheung 21999b6cbf mqtt_mux: add feedback for singletone/clock 2020-09-29 17:02:43 +08:00
occheung b75c83be61 mqtt: changeable root topic name 2020-09-29 17:02:15 +08:00
occheung 95443a2283 urukul: add urukul clock config getter 2020-09-29 14:22:05 +08:00
occheung 3abc0c3e4e dds: improve comment 2020-09-29 14:21:26 +08:00
occheung 7181bdc0ae cargosha256: update 2020-09-29 12:37:23 +08:00
occheung ba184c962c readme: fix topic prefix 2020-09-29 10:30:05 +08:00
occheung e42199a675 readme: fix table 2020-09-28 20:15:12 +08:00
occheung 94ecfc53ea readme: add details 2020-09-28 17:36:51 +08:00
occheung c467b9a1b9 mqtt_mux: add feedback 2020-09-28 14:15:37 +08:00
occheung 90446bcce2 dds: fix tab 2020-09-28 14:13:32 +08:00
occheung dcf1c94dda cargo: include ryu 2020-09-28 14:13:02 +08:00
occheung fe5ea3486a Merge branch 'master' of https://git.m-labs.hk/occheung/firmware-development 2020-09-25 17:08:35 +08:00
occheung 0a3518573a dds: add frequency sweep 2020-09-25 17:07:52 +08:00