From f32de647d325930e6f8182e1171700f8ab448261 Mon Sep 17 00:00:00 2001
From: occheung <dc@m-labs.hk>
Date: Fri, 14 Aug 2020 14:14:14 +0800
Subject: [PATCH] dds: add all cfg enum

---
 src/dds.rs | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/src/dds.rs b/src/dds.rs
index 9714b90..e276395 100644
--- a/src/dds.rs
+++ b/src/dds.rs
@@ -26,6 +26,37 @@ construct_bitmask!(CFR1Mask; u32;
 	RAM_ENABLE,						31,	1
 );
 
+construct_bitmask!(CFR2Mask; u32;
+	FM_GAIN,						0,	4,
+	PARALLEL_DATA_PORT_ENABLE,		4,	1,
+	SYNC_TIM_VALIDATION_DISABLE,	5,	1,
+	DATA_ASSEM_HOLD_LAST_VALUE,		6,	1,
+	MATCHED_LATENCY_ENABLE,			7,	1,
+	TXENABLE_INV,					9,	1,
+	PDCLK_INV,						10,	1,
+	PDCLK_ENABLE,					11,	1,
+	IO_UPDATE_RATE_CTRL,			14,	2,
+	READ_EFFECTIVE_FTW,				16,	1,
+	DIGITAL_RAMP_NO_DWELL_LOW,		17,	1,
+	DIGITAL_RAMP_NO_DWELL_HIGH,		18,	1,
+	DIGITAL_RAMP_ENABLE,			19,	1,
+	DIGITAL_RAMP_DEST,				20,	2,
+	SYNC_CLK_ENABLE,				22,	1,	
+	INT_IO_UPDATE_ACTIVE,			23,	1,
+	EN_AMP_SCALE_SINGLE_TONE_PRO,	24,	1
+);
+
+construct_bitmask!(CFR3Mask; u32;
+	N,								1,	7,
+	PLL_ENABLE,						8,	1,
+	PFD_RESET,						10,	1,
+	REFCLK_IN_DIV_RESETB,			14,	1,
+	REFCLK_IN_DIV_BYPASS,			15,	1,
+	I_CP,							19,	3,
+	VCO_SEL,						24,	3,
+	DRV0,							28,	2
+)
+
 pub struct DDS<SPI> {
 	spi: SPI,
 }