From e77e6e66bcf39e991a98af1c195f3ffa31814b07 Mon Sep 17 00:00:00 2001 From: occheung Date: Fri, 25 Sep 2020 14:29:33 +0800 Subject: [PATCH] fpga_config: fix tab/space --- fpga/fpga_config.py | 130 ++++++++++++++++++++++---------------------- 1 file changed, 65 insertions(+), 65 deletions(-) diff --git a/fpga/fpga_config.py b/fpga/fpga_config.py index f8cb4c2..c513012 100644 --- a/fpga/fpga_config.py +++ b/fpga/fpga_config.py @@ -8,85 +8,85 @@ from migen.genlib.io import * class UrukulConnector(Module): - def __init__(self, platform): - # Include extension - spi_mosi = [ - ("spi_mosi", 0, Pins("B16"), IOStandard("LVCMOS33")) - ] - spi_cs = [ - ("spi_cs", 0, Pins("B13 B14 B15"), IOStandard("LVCMOS33")) - ] - io_update = [ - ("io_update", 0, Pins("A11"), IOStandard("LVCMOS33")) - ] + def __init__(self, platform): + # Include extension + spi_mosi = [ + ("spi_mosi", 0, Pins("B16"), IOStandard("LVCMOS33")) + ] + spi_cs = [ + ("spi_cs", 0, Pins("B13 B14 B15"), IOStandard("LVCMOS33")) + ] + io_update = [ + ("io_update", 0, Pins("A11"), IOStandard("LVCMOS33")) + ] - # Add extensions - platform.add_extension(spi_cs) - platform.add_extension(io_update) - platform.add_extension(spi_mosi) + # Add extensions + platform.add_extension(spi_cs) + platform.add_extension(io_update) + platform.add_extension(spi_mosi) - # Request EEM I/O & SPI - eem0 = [ - platform.request("eem0", 0), - platform.request("eem0", 1), - # Supply EEM pin with negative polarity - # See issue/PR: https://github.com/m-labs/migen/pull/181 - platform.request("eem0_n", 2), - platform.request("eem0", 3), - platform.request("eem0", 4), - platform.request("eem0", 5), - platform.request("eem0", 6) - ] - spi = platform.request("spi") - spi_mosi = platform.request("spi_mosi") - spi_cs = platform.request("spi_cs") - led = platform.request("user_led") - io_update = platform.request("io_update") + # Request EEM I/O & SPI + eem0 = [ + platform.request("eem0", 0), + platform.request("eem0", 1), + # Supply EEM pin with negative polarity + # See issue/PR: https://github.com/m-labs/migen/pull/181 + platform.request("eem0_n", 2), + platform.request("eem0", 3), + platform.request("eem0", 4), + platform.request("eem0", 5), + platform.request("eem0", 6) + ] + spi = platform.request("spi") + spi_mosi = platform.request("spi_mosi") + spi_cs = platform.request("spi_cs") + led = platform.request("user_led") + io_update = platform.request("io_update") - assert len(spi.clk) == 1 - assert len(spi_mosi) == 1 - assert len(spi.miso) == 1 - assert len(spi_cs) == 3 - assert len(io_update) == 1 + assert len(spi.clk) == 1 + assert len(spi_mosi) == 1 + assert len(spi.miso) == 1 + assert len(spi_cs) == 3 + assert len(io_update) == 1 - # Flip negative input to positive output - self.miso_n = Signal() + # Flip negative input to positive output + self.miso_n = Signal() - # Very similar setup to Diff setup for iCE40 suggested, but gave B pin instead - self.specials += Instance("SB_IO", - p_PIN_TYPE=C(0b000001, 6), - p_IO_STANDARD="SB_LVDS_INPUT", - io_PACKAGE_PIN=eem0[2], - o_D_IN_0=self.miso_n - ) + # Very similar setup to Diff setup for iCE40 suggested, but gave B pin instead + self.specials += Instance("SB_IO", + p_PIN_TYPE=C(0b000001, 6), + p_IO_STANDARD="SB_LVDS_INPUT", + io_PACKAGE_PIN=eem0[2], + o_D_IN_0=self.miso_n + ) - # Link EEM to SPI - self.comb += [ + # Link EEM to SPI + self.comb += [ - eem0[0].p.eq(spi.clk), - eem0[0].n.eq(~spi.clk), + eem0[0].p.eq(spi.clk), + eem0[0].n.eq(~spi.clk), - eem0[1].p.eq(spi_mosi), - eem0[1].n.eq(~spi_mosi), + eem0[1].p.eq(spi_mosi), + eem0[1].n.eq(~spi_mosi), - spi.miso.eq(~self.miso_n), + spi.miso.eq(~self.miso_n), - eem0[3].p.eq(spi_cs[0]), - eem0[3].n.eq(~spi_cs[0]), + eem0[3].p.eq(spi_cs[0]), + eem0[3].n.eq(~spi_cs[0]), - eem0[4].p.eq(spi_cs[1]), - eem0[4].n.eq(~spi_cs[1]), + eem0[4].p.eq(spi_cs[1]), + eem0[4].n.eq(~spi_cs[1]), - eem0[5].p.eq(spi_cs[2]), - eem0[5].n.eq(~spi_cs[2]), + eem0[5].p.eq(spi_cs[2]), + eem0[5].n.eq(~spi_cs[2]), - eem0[6].p.eq(io_update), - eem0[6].n.eq(~io_update), + eem0[6].p.eq(io_update), + eem0[6].n.eq(~io_update), - led.eq(1) - ] + led.eq(1) + ] if __name__ == "__main__": - platform = humpback.Platform() - platform.build(UrukulConnector(platform)) + platform = humpback.Platform() + platform.build(UrukulConnector(platform))