diff --git a/src/dds.rs b/src/dds.rs index a806cf3..53f05a6 100644 --- a/src/dds.rs +++ b/src/dds.rs @@ -55,7 +55,7 @@ construct_bitmask!(CFR3Mask; u32; I_CP, 19, 3, VCO_SEL, 24, 3, DRV0, 28, 2 -) +); const WRITE_MASK :u8 = 0x00; const READ_MASK :u8 = 0x80; @@ -75,7 +75,7 @@ where } } -impl Transfer for ConfigRegister +impl Transfer for DDS where SPI: Transfer { @@ -97,16 +97,41 @@ macro_rules! impl_register_io { $( $reg_addr => { assert_eq!(bytes.len(), $reg_byte_size); - let arr: [u8; $reg_byte_size + 1] = [addr, 0; $reg_byte_size]; + let mut arr: [u8; $reg_byte_size + 1] = [0; ($reg_byte_size + 1)]; + arr[0] = addr | WRITE_MASK; for i in 0..$reg_byte_size { arr[i+1] = bytes[i]; } - match self.spi.transfer(words).map_err(Error) { + match self.spi.transfer(&mut arr).map_err(Error::SPI) { Ok(v) => Ok(()), Err(e) => Err(e), - }, + } }, )* + _ => panic!("Bad address for DDS writing.") + } + } + + pub fn read_register<'w>(&mut self, addr: u8, bytes: &'w mut[u8]) -> Result<&'w [u8], Error> { + match addr { + $( + $reg_addr => { + assert_eq!(bytes.len(), $reg_byte_size); + let mut arr: [u8; $reg_byte_size + 1] = [0; ($reg_byte_size + 1)]; + arr[0] = addr | READ_MASK; + match self.spi.transfer(&mut arr).map_err(Error::SPI) { + Ok(ret) => { + assert_eq!(ret.len(), $reg_byte_size + 1); + for i in 0..$reg_byte_size { + bytes[i] = ret[i+1]; + } + Ok(bytes) + }, + Err(e) => Err(e), + } + }, + )* + _ => panic!("Bad address for DDS reading.") } } } diff --git a/src/lib.rs b/src/lib.rs index 2ffe07d..8915a87 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -19,7 +19,7 @@ use crate::spi_slave::Parts; pub mod config_register; pub mod attenuator; - +pub mod dds; /* * Enum for structuring error diff --git a/src/main.rs b/src/main.rs index 26c24ab..69d452a 100644 --- a/src/main.rs +++ b/src/main.rs @@ -25,6 +25,7 @@ use firmware::{ ConfigRegister, CFGMask, }, + dds::DDS, }; #[entry] @@ -110,6 +111,8 @@ fn main() -> ! { (CFGMask::DIV, 0x0), ]).unwrap()).unwrap(); + let mut dds = DDS::new(parts.spi4); + loop { nop(); }