From 69761c45177ebfbdfa7cc76d751c43e4a6374382 Mon Sep 17 00:00:00 2001
From: occheung <dc@m-labs.hk>
Date: Mon, 31 Aug 2020 09:34:38 +0800
Subject: [PATCH] cpld: fix indent

---
 src/cpld.rs | 304 ++++++++++++++++++++++++++--------------------------
 1 file changed, 152 insertions(+), 152 deletions(-)

diff --git a/src/cpld.rs b/src/cpld.rs
index 504bf04..9e705e4 100644
--- a/src/cpld.rs
+++ b/src/cpld.rs
@@ -11,155 +11,155 @@ use core::cell;
 /*
  *	Basic structure for CPLD signal multiplexing
  */
- #[derive(Debug)]
- pub struct CPLDData<SPI, CS0, CS1, CS2, GPIO> {
-     pub(crate) spi: SPI,
-     pub(crate) chip_select: (CS0, CS1, CS2),
-     pub(crate) io_update: GPIO,
- }
- 
- #[derive(Debug)]
- pub struct CPLD<SPI, CS0, CS1, CS2, GPIO> {
-     pub(crate) data: cell::RefCell<CPLDData<SPI, CS0, CS1, CS2, GPIO>>,
- }
- 
- pub trait SelectChip {
-     type Error;
-     fn select_chip(&mut self, chip: u8) -> Result<(), Self::Error>;
- }
- 
- impl<SPI, CS0, CS1, CS2, GPIO, E> SelectChip for CPLDData<SPI, CS0, CS1, CS2, GPIO>
- where
-     SPI: Transfer<u8, Error = E>,
-     CS0: OutputPin,
-     CS1: OutputPin,
-     CS2: OutputPin,
-     GPIO: OutputPin,
- {
-     type Error = Error<E>;
-     fn select_chip(&mut self, chip: u8) -> Result<(), Self::Error> {
-         match chip & (1 << 0) {
-             0 => self.chip_select.0.set_low(),
-             _ => self.chip_select.0.set_high(),
-         }.map_err(|_| Error::CSError)?;
-         match chip & (1 << 1) {
-             0 => self.chip_select.1.set_low(),
-             _ => self.chip_select.1.set_high(),
-         }.map_err(|_| Error::CSError)?;
-         match chip & (1 << 2) {
-             0 => self.chip_select.2.set_low(),
-             _ => self.chip_select.2.set_high(),
-         }.map_err(|_| Error::CSError)?;
-         Ok(())
-     }
- }
- 
- pub trait IssueIOUpdate {
-     type Error;
-     fn issue_io_update(&mut self) -> Result<(), Self::Error>;
- }
- 
- impl<SPI, CS0, CS1, CS2, GPIO, E> IssueIOUpdate for CPLDData<SPI, CS0, CS1, CS2, GPIO>
- where
-     SPI: Transfer<u8>,
-     CS0: OutputPin,
-     CS1: OutputPin,
-     CS2: OutputPin,
-     GPIO: OutputPin<Error = E>,
- {
-     type Error = Error<E>;
- 
-     fn issue_io_update(&mut self) -> Result<(), Self::Error> {
-         self.io_update.set_high().map_err(|_| Error::IOUpdateError)?;
-         self.io_update.set_low().map_err(|_| Error::IOUpdateError)
-     }
- }
- 
- pub trait DoOnGetRefMutData<SPI, CS0, CS1, CS2, GPIO> {
-     fn do_on_get_ref_mut_data<R, E>(
-         &self,
-         f: impl FnOnce(cell::RefMut<CPLDData<SPI, CS0, CS1, CS2, GPIO>>) -> Result<R, Error<E>>,
-     ) -> Result<R, Error<E>>;
- }
- 
- impl<SPI, CS0, CS1, CS2, GPIO> DoOnGetRefMutData<SPI, CS0, CS1, CS2, GPIO> for CPLD<SPI, CS0, CS1, CS2, GPIO> {
-     fn do_on_get_ref_mut_data<R, E>(
-         &self,
-         f: impl FnOnce(cell::RefMut<CPLDData<SPI, CS0, CS1, CS2, GPIO>>) -> Result<R, Error<E>>,
-     ) -> Result<R, Error<E>> {
-         let dev = self
-             .data
-             .try_borrow_mut()
-             .map_err(|_| Error::GetRefMutDataError)?;
-         f(dev)
-     }
- }
- 
- impl<SPI, CS0, CS1, CS2, GPIO, E> Transfer<u8> for CPLD<SPI, CS0, CS1, CS2, GPIO>
- where
-     SPI: Transfer<u8, Error = E>,
-     CS0: OutputPin,
-     CS1: OutputPin,
-     CS2: OutputPin,
-     GPIO: OutputPin,
- {
-     type Error = Error<E>;
- 
-     fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> {
-         self.do_on_get_ref_mut_data(move |mut dev| dev.spi.transfer(words).map_err(Error::SPI))
-     }
- }
- 
- impl<SPI, CS0, CS1, CS2, GPIO, E> CPLD<SPI, CS0, CS1, CS2, GPIO> where
-     SPI: Transfer<u8, Error = E>,
-     CS0: OutputPin,
-     CS1: OutputPin,
-     CS2: OutputPin,
-     GPIO: OutputPin
- {
-     // Constructor for CPLD
-     pub fn new(spi: SPI, chip_select: (CS0, CS1, CS2), io_update: GPIO) -> Self {
- 
-         // Init data
-         let data = CPLDData {
-             spi,
-             chip_select,
-             io_update,
-         };
- 
-         // Init CPLD
-         CPLD {
-             data: cell::RefCell::new(data),
-         }
-     }
- 
-     // Destroy the wrapper, return the CPLD data
-     pub fn destroy(self) -> (SPI, (CS0, CS1, CS2), GPIO) {
-         let cpld = self.data.into_inner();
-         (cpld.spi, cpld.chip_select, cpld.io_update)
-     }
- 
-     // Split SPI into chips, wrapped by Parts struct
-     pub fn split<'a>(&'a self) -> Parts<'a, CPLD<SPI, CS0, CS1, CS2, GPIO>, SPI, CS0, CS1, CS2, GPIO> {
-         Parts::new(&self)
-     }
- 
-     // Select Chip
-     pub fn select_chip(&mut self, channel: u8) -> Result<(), Error<E>> {
-         self.do_on_get_ref_mut_data(|mut dev| dev.select_chip(channel))
-     }
- }
- 
- impl<SPI, CS0, CS1, CS2, GPIO, E> CPLD<SPI, CS0, CS1, CS2, GPIO>
- where
-     SPI: Transfer<u8>,
-     CS0: OutputPin,
-     CS1: OutputPin,
-     CS2: OutputPin,
-     GPIO: OutputPin<Error = E>
- {	
-     // Issue I/O Update
-     pub fn issue_io_update(&mut self) -> Result<(), Error<E>> {
-         self.do_on_get_ref_mut_data(|mut dev| dev.issue_io_update())
-     }
- }
\ No newline at end of file
+#[derive(Debug)]
+pub struct CPLDData<SPI, CS0, CS1, CS2, GPIO> {
+    pub(crate) spi: SPI,
+    pub(crate) chip_select: (CS0, CS1, CS2),
+    pub(crate) io_update: GPIO,
+}
+
+#[derive(Debug)]
+pub struct CPLD<SPI, CS0, CS1, CS2, GPIO> {
+    pub(crate) data: cell::RefCell<CPLDData<SPI, CS0, CS1, CS2, GPIO>>,
+}
+
+pub trait SelectChip {
+    type Error;
+    fn select_chip(&mut self, chip: u8) -> Result<(), Self::Error>;
+}
+
+impl<SPI, CS0, CS1, CS2, GPIO, E> SelectChip for CPLDData<SPI, CS0, CS1, CS2, GPIO>
+where
+    SPI: Transfer<u8, Error = E>,
+    CS0: OutputPin,
+    CS1: OutputPin,
+    CS2: OutputPin,
+    GPIO: OutputPin,
+{
+    type Error = Error<E>;
+    fn select_chip(&mut self, chip: u8) -> Result<(), Self::Error> {
+        match chip & (1 << 0) {
+            0 => self.chip_select.0.set_low(),
+            _ => self.chip_select.0.set_high(),
+        }.map_err(|_| Error::CSError)?;
+        match chip & (1 << 1) {
+            0 => self.chip_select.1.set_low(),
+            _ => self.chip_select.1.set_high(),
+        }.map_err(|_| Error::CSError)?;
+        match chip & (1 << 2) {
+            0 => self.chip_select.2.set_low(),
+            _ => self.chip_select.2.set_high(),
+        }.map_err(|_| Error::CSError)?;
+        Ok(())
+    }
+}
+
+pub trait IssueIOUpdate {
+    type Error;
+    fn issue_io_update(&mut self) -> Result<(), Self::Error>;
+}
+
+impl<SPI, CS0, CS1, CS2, GPIO, E> IssueIOUpdate for CPLDData<SPI, CS0, CS1, CS2, GPIO>
+where
+    SPI: Transfer<u8>,
+    CS0: OutputPin,
+    CS1: OutputPin,
+    CS2: OutputPin,
+    GPIO: OutputPin<Error = E>,
+{
+    type Error = Error<E>;
+
+    fn issue_io_update(&mut self) -> Result<(), Self::Error> {
+        self.io_update.set_high().map_err(|_| Error::IOUpdateError)?;
+        self.io_update.set_low().map_err(|_| Error::IOUpdateError)
+    }
+}
+
+pub trait DoOnGetRefMutData<SPI, CS0, CS1, CS2, GPIO> {
+    fn do_on_get_ref_mut_data<R, E>(
+        &self,
+        f: impl FnOnce(cell::RefMut<CPLDData<SPI, CS0, CS1, CS2, GPIO>>) -> Result<R, Error<E>>,
+    ) -> Result<R, Error<E>>;
+}
+
+impl<SPI, CS0, CS1, CS2, GPIO> DoOnGetRefMutData<SPI, CS0, CS1, CS2, GPIO> for CPLD<SPI, CS0, CS1, CS2, GPIO> {
+    fn do_on_get_ref_mut_data<R, E>(
+        &self,
+        f: impl FnOnce(cell::RefMut<CPLDData<SPI, CS0, CS1, CS2, GPIO>>) -> Result<R, Error<E>>,
+    ) -> Result<R, Error<E>> {
+        let dev = self
+            .data
+            .try_borrow_mut()
+            .map_err(|_| Error::GetRefMutDataError)?;
+        f(dev)
+    }
+}
+
+impl<SPI, CS0, CS1, CS2, GPIO, E> Transfer<u8> for CPLD<SPI, CS0, CS1, CS2, GPIO>
+where
+    SPI: Transfer<u8, Error = E>,
+    CS0: OutputPin,
+    CS1: OutputPin,
+    CS2: OutputPin,
+    GPIO: OutputPin,
+{
+    type Error = Error<E>;
+
+    fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> {
+        self.do_on_get_ref_mut_data(move |mut dev| dev.spi.transfer(words).map_err(Error::SPI))
+    }
+}
+
+impl<SPI, CS0, CS1, CS2, GPIO, E> CPLD<SPI, CS0, CS1, CS2, GPIO> where
+    SPI: Transfer<u8, Error = E>,
+    CS0: OutputPin,
+    CS1: OutputPin,
+    CS2: OutputPin,
+    GPIO: OutputPin
+{
+    // Constructor for CPLD
+    pub fn new(spi: SPI, chip_select: (CS0, CS1, CS2), io_update: GPIO) -> Self {
+
+        // Init data
+        let data = CPLDData {
+            spi,
+            chip_select,
+            io_update,
+        };
+
+        // Init CPLD
+        CPLD {
+            data: cell::RefCell::new(data),
+        }
+    }
+
+    // Destroy the wrapper, return the CPLD data
+    pub fn destroy(self) -> (SPI, (CS0, CS1, CS2), GPIO) {
+        let cpld = self.data.into_inner();
+        (cpld.spi, cpld.chip_select, cpld.io_update)
+    }
+
+    // Split SPI into chips, wrapped by Parts struct
+    pub fn split<'a>(&'a self) -> Parts<'a, CPLD<SPI, CS0, CS1, CS2, GPIO>, SPI, CS0, CS1, CS2, GPIO> {
+        Parts::new(&self)
+    }
+
+    // Select Chip
+    pub fn select_chip(&mut self, channel: u8) -> Result<(), Error<E>> {
+        self.do_on_get_ref_mut_data(|mut dev| dev.select_chip(channel))
+    }
+}
+
+impl<SPI, CS0, CS1, CS2, GPIO, E> CPLD<SPI, CS0, CS1, CS2, GPIO>
+where
+    SPI: Transfer<u8>,
+    CS0: OutputPin,
+    CS1: OutputPin,
+    CS2: OutputPin,
+    GPIO: OutputPin<Error = E>
+{	
+    // Issue I/O Update
+    pub fn issue_io_update(&mut self) -> Result<(), Error<E>> {
+        self.do_on_get_ref_mut_data(|mut dev| dev.issue_io_update())
+    }
+}
\ No newline at end of file