2020-08-11 00:07:07 +08:00
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use embedded_hal::{
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blocking::spi::Transfer,
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digital::v2::OutputPin,
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2020-08-10 17:04:40 +08:00
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};
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2020-09-17 12:19:05 +08:00
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use crate::cpld::CPLD;
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2020-08-31 09:31:56 +08:00
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use crate::Error;
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2020-08-10 17:04:40 +08:00
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2020-09-17 12:19:05 +08:00
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pub struct SPISlave<'a, SPI, CS0, CS1, CS2, GPIO> (
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// SPI device to be multiplexed
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&'a CPLD<SPI, CS0, CS1, CS2, GPIO>,
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// Channel of SPI slave
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u8,
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// Need I/O Update
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bool,
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2020-08-10 17:04:40 +08:00
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);
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2020-09-17 12:19:05 +08:00
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pub struct Parts<'a, SPI, CS0, CS1, CS2, GPIO> {
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pub spi1: SPISlave<'a, SPI, CS0, CS1, CS2, GPIO>,
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pub spi2: SPISlave<'a, SPI, CS0, CS1, CS2, GPIO>,
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pub spi3: SPISlave<'a, SPI, CS0, CS1, CS2, GPIO>,
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pub spi4: SPISlave<'a, SPI, CS0, CS1, CS2, GPIO>,
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pub spi5: SPISlave<'a, SPI, CS0, CS1, CS2, GPIO>,
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pub spi6: SPISlave<'a, SPI, CS0, CS1, CS2, GPIO>,
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pub spi7: SPISlave<'a, SPI, CS0, CS1, CS2, GPIO>,
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2020-08-10 17:04:40 +08:00
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}
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2020-09-17 12:19:05 +08:00
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impl<'a, SPI, CS0, CS1, CS2, GPIO> Parts<'a, SPI, CS0, CS1, CS2, GPIO> {
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pub(crate) fn new(cpld: &'a CPLD<SPI, CS0, CS1, CS2, GPIO>) -> Self {
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2020-08-10 17:04:40 +08:00
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Parts {
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2020-09-17 12:19:05 +08:00
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spi1: SPISlave(&cpld, 1, false),
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spi2: SPISlave(&cpld, 2, false),
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spi3: SPISlave(&cpld, 3, true),
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spi4: SPISlave(&cpld, 4, true),
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spi5: SPISlave(&cpld, 5, true),
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spi6: SPISlave(&cpld, 6, true),
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spi7: SPISlave(&cpld, 7, true),
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2020-08-10 17:04:40 +08:00
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}
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}
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}
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2020-09-17 12:19:05 +08:00
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impl<'a, SPI, CS0, CS1, CS2, GPIO, E> Transfer<u8> for SPISlave<'a, SPI, CS0, CS1, CS2, GPIO>
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2020-08-10 17:04:40 +08:00
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where
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CS2: OutputPin,
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CS1: OutputPin,
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CS0: OutputPin,
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SPI: Transfer<u8, Error = E>,
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2020-08-24 17:03:44 +08:00
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GPIO: OutputPin,
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2020-08-10 17:04:40 +08:00
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{
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type Error = Error<E>;
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fn transfer<'w>(&mut self, words: &'w mut[u8]) -> Result<&'w [u8], Self::Error> {
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2020-09-17 12:19:05 +08:00
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let mut dev = self.0.data.try_borrow_mut().map_err(|_| Error::GetRefMutDataError)?;
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dev.select_chip(self.1).map_err(|_| Error::CSError)?;
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let result = dev.spi.transfer(words).map_err(Error::SPI)?;
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dev.select_chip(0).map_err(|_| Error::CSError)?;
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if self.2 {
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dev.issue_io_update().map_err(|_| Error::IOUpdateError)?;
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}
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Ok(result)
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2020-08-10 17:04:40 +08:00
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}
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}
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