humpback-dds/nmigen/fpga_config.py

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2020-08-07 13:39:43 +08:00
# If the design does not create a "sync" clock domain, it is created by the nMigen build system
# using the platform default clock (and default reset, if any).
from nmigen import *
from humpback import *
class SimpleBlink(Elaboratable):
def elaborate(self, platform):
led = platform.request("user_led", 0)
counter = Signal(24)
pin = platform.request("gpioa", 0)
m = Module()
m.d.sync += counter.eq(counter + 1)
m.d.comb += led.o.eq(counter[23])
m.d.comb += pin.o.eq(led)
return m
if __name__ == "__main__":
platform = HumpbackPlatform()
platform.build(SimpleBlink(), do_program=False)