434 lines
17 KiB
Rust
434 lines
17 KiB
Rust
extern crate gcc;
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extern crate rustc_cfg;
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use std::collections::BTreeMap;
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use std::io::Write;
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use std::path::Path;
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use std::{env, io, process};
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use rustc_cfg::Cfg;
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struct Sources {
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// SYMBOL -> PATH TO SOURCE
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map: BTreeMap<&'static str, &'static str>,
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}
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impl Sources {
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fn new() -> Sources {
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Sources { map: BTreeMap::new() }
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}
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fn extend(&mut self, sources: &[&'static str]) {
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// NOTE Some intrinsics have both a generic implementation (e.g.
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// `floatdidf.c`) and an arch optimized implementation
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// (`x86_64/floatdidf.c`). In those cases, we keep the arch optimized
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// implementation and discard the generic implementation. If we don't
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// and keep both implementations, the linker will yell at us about
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// duplicate symbols!
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for &src in sources {
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let symbol = Path::new(src).file_stem().unwrap().to_str().unwrap();
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if src.contains("/") {
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// Arch-optimized implementation (preferred)
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self.map.insert(symbol, src);
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} else {
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// Generic implementation
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if !self.map.contains_key(symbol) {
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self.map.insert(symbol, src);
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}
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}
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}
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}
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fn remove(&mut self, symbols: &[&str]) {
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for symbol in symbols {
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self.map.remove(*symbol).unwrap();
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}
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}
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}
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fn main() {
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println!("cargo:rerun-if-changed=build.rs");
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let target = env::var("TARGET").unwrap();
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let Cfg { ref target_arch, ref target_os, ref target_env, ref target_vendor, .. } =
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Cfg::new(&target).unwrap_or_else(|e| {
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writeln!(io::stderr(), "{}", e).ok();
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process::exit(1)
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});
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// NOTE we are going to assume that llvm-target, what determines our codegen option, matches the
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// target triple. This is usually correct for our built-in targets but can break in presence of
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// custom targets, which can have arbitrary names.
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let llvm_target = target.split('-').collect::<Vec<_>>();
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let target_vendor = target_vendor.as_ref().unwrap();
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// Build missing intrinsics from compiler-rt C source code
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if env::var_os("CARGO_FEATURE_C").is_some() {
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let cfg = &mut gcc::Config::new();
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if target_env == "msvc" {
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// Don't pull in extra libraries on MSVC
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cfg.flag("/Zl");
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// Emulate C99 and C++11's __func__ for MSVC prior to 2013 CTP
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cfg.define("__func__", Some("__FUNCTION__"));
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} else {
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// Turn off various features of gcc and such, mostly copying
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// compiler-rt's build system already
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cfg.flag("-fno-builtin");
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cfg.flag("-fvisibility=hidden");
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cfg.flag("-fomit-frame-pointer");
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cfg.flag("-ffreestanding");
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cfg.define("VISIBILITY_HIDDEN", None);
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}
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// NOTE Most of the ARM intrinsics are written in assembly. Tell gcc which arch we are going to
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// target to make sure that the assembly implementations really work for the target. If the
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// implementation is not valid for the arch, then gcc will error when compiling it.
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if llvm_target[0].starts_with("thumb") {
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cfg.flag("-mthumb");
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if llvm_target.last() == Some(&"eabihf") {
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cfg.flag("-mfloat-abi=hard");
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}
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}
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if llvm_target[0] == "thumbv6m" {
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cfg.flag("-march=armv6-m");
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}
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if llvm_target[0] == "thumbv7m" {
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cfg.flag("-march=armv7-m");
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}
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if llvm_target[0] == "thumbv7em" {
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cfg.flag("-march=armv7e-m");
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}
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let mut sources = Sources::new();
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sources.extend(&["absvdi2.c",
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"absvsi2.c",
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"addvdi3.c",
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"addvsi3.c",
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"apple_versioning.c",
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"clear_cache.c",
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"clzdi2.c",
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"clzsi2.c",
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"cmpdi2.c",
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"comparedf2.c",
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"comparesf2.c",
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"ctzdi2.c",
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"ctzsi2.c",
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"divdc3.c",
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"divdf3.c",
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"divsc3.c",
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"divsf3.c",
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"divxc3.c",
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"extendsfdf2.c",
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"extendhfsf2.c",
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"ffsdi2.c",
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"fixdfdi.c",
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"fixdfsi.c",
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"fixsfdi.c",
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"fixsfsi.c",
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"fixunsdfdi.c",
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"fixunsdfsi.c",
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"fixunssfdi.c",
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"fixunssfsi.c",
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"fixunsxfdi.c",
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"fixunsxfsi.c",
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"fixxfdi.c",
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"floatdidf.c",
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"floatdisf.c",
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"floatdixf.c",
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"floatsidf.c",
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"floatsisf.c",
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"floatundidf.c",
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"floatundisf.c",
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"floatundixf.c",
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"floatunsidf.c",
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"floatunsisf.c",
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"int_util.c",
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"muldc3.c",
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"muldf3.c",
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"mulsc3.c",
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"mulsf3.c",
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"mulvdi3.c",
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"mulvsi3.c",
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"mulxc3.c",
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"negdf2.c",
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"negdi2.c",
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"negsf2.c",
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"negvdi2.c",
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"negvsi2.c",
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"paritydi2.c",
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"paritysi2.c",
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"popcountdi2.c",
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"popcountsi2.c",
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"powixf2.c",
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"subdf3.c",
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"subsf3.c",
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"subvdi3.c",
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"subvsi3.c",
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"truncdfhf2.c",
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"truncdfsf2.c",
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"truncsfhf2.c",
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"ucmpdi2.c"]);
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if target_os != "ios" {
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sources.extend(&["absvti2.c",
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"addtf3.c",
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"addvti3.c",
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"clzti2.c",
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"cmpti2.c",
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"ctzti2.c",
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"divtf3.c",
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"ffsti2.c",
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"fixdfti.c",
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"fixsfti.c",
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"fixunsdfti.c",
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"fixunssfti.c",
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"fixunsxfti.c",
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"fixxfti.c",
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"floattidf.c",
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"floattisf.c",
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"floattixf.c",
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"floatuntidf.c",
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"floatuntisf.c",
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"floatuntixf.c",
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"multf3.c",
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"mulvti3.c",
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"negti2.c",
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"negvti2.c",
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"parityti2.c",
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"popcountti2.c",
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"powitf2.c",
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"subtf3.c",
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"subvti3.c",
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"trampoline_setup.c",
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"ucmpti2.c"]);
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}
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if target_vendor == "apple" {
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sources.extend(&["atomic_flag_clear.c",
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"atomic_flag_clear_explicit.c",
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"atomic_flag_test_and_set.c",
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"atomic_flag_test_and_set_explicit.c",
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"atomic_signal_fence.c",
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"atomic_thread_fence.c"]);
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}
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if target_os != "windows" && target_os != "none" {
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sources.extend(&["emutls.c"]);
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}
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if target_env == "msvc" {
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if target_arch == "x86_64" {
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sources.extend(&["x86_64/floatdidf.c", "x86_64/floatdisf.c", "x86_64/floatdixf.c"]);
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}
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} else {
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if target_os != "freebsd" {
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sources.extend(&["gcc_personality_v0.c"]);
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}
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if target_arch == "x86_64" {
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sources.extend(&["x86_64/chkstk.S",
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"x86_64/chkstk2.S",
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"x86_64/floatdidf.c",
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"x86_64/floatdisf.c",
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"x86_64/floatdixf.c",
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"x86_64/floatundidf.S",
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"x86_64/floatundisf.S",
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"x86_64/floatundixf.S"]);
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}
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if target_arch == "x86" {
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sources.extend(&["i386/ashldi3.S",
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"i386/ashrdi3.S",
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"i386/chkstk.S",
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"i386/chkstk2.S",
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"i386/divdi3.S",
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"i386/floatdidf.S",
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"i386/floatdisf.S",
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"i386/floatdixf.S",
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"i386/floatundidf.S",
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"i386/floatundisf.S",
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"i386/floatundixf.S",
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"i386/lshrdi3.S",
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"i386/moddi3.S",
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"i386/muldi3.S",
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"i386/udivdi3.S",
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"i386/umoddi3.S"]);
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}
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}
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if target_arch == "arm" && target_os != "ios" {
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sources.extend(&["arm/aeabi_cdcmp.S",
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"arm/aeabi_cdcmpeq_check_nan.c",
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"arm/aeabi_cfcmp.S",
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"arm/aeabi_cfcmpeq_check_nan.c",
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"arm/aeabi_dcmp.S",
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"arm/aeabi_div0.c",
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"arm/aeabi_drsub.c",
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"arm/aeabi_fcmp.S",
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"arm/aeabi_frsub.c",
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"arm/bswapdi2.S",
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"arm/bswapsi2.S",
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"arm/clzdi2.S",
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"arm/clzsi2.S",
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"arm/comparesf2.S",
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"arm/divmodsi4.S",
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"arm/divsi3.S",
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"arm/modsi3.S",
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"arm/switch16.S",
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"arm/switch32.S",
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"arm/switch8.S",
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"arm/switchu8.S",
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"arm/sync_synchronize.S",
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"arm/udivmodsi4.S",
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"arm/udivsi3.S",
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"arm/umodsi3.S"]);
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}
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if llvm_target[0] == "armv7" {
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sources.extend(&["arm/sync_fetch_and_add_4.S",
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"arm/sync_fetch_and_add_8.S",
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"arm/sync_fetch_and_and_4.S",
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"arm/sync_fetch_and_and_8.S",
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"arm/sync_fetch_and_max_4.S",
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"arm/sync_fetch_and_max_8.S",
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"arm/sync_fetch_and_min_4.S",
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"arm/sync_fetch_and_min_8.S",
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"arm/sync_fetch_and_nand_4.S",
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"arm/sync_fetch_and_nand_8.S",
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"arm/sync_fetch_and_or_4.S",
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"arm/sync_fetch_and_or_8.S",
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"arm/sync_fetch_and_sub_4.S",
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"arm/sync_fetch_and_sub_8.S",
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"arm/sync_fetch_and_umax_4.S",
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"arm/sync_fetch_and_umax_8.S",
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"arm/sync_fetch_and_umin_4.S",
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"arm/sync_fetch_and_umin_8.S",
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"arm/sync_fetch_and_xor_4.S",
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"arm/sync_fetch_and_xor_8.S"]);
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}
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if llvm_target.last().unwrap().ends_with("eabihf") {
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if !llvm_target[0].starts_with("thumbv7em") {
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sources.extend(&["arm/adddf3vfp.S",
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"arm/addsf3vfp.S",
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"arm/divdf3vfp.S",
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"arm/divsf3vfp.S",
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"arm/eqdf2vfp.S",
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"arm/eqsf2vfp.S",
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"arm/extendsfdf2vfp.S",
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"arm/fixdfsivfp.S",
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"arm/fixsfsivfp.S",
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"arm/fixunsdfsivfp.S",
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"arm/fixunssfsivfp.S",
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"arm/floatsidfvfp.S",
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"arm/floatsisfvfp.S",
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"arm/floatunssidfvfp.S",
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"arm/floatunssisfvfp.S",
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"arm/gedf2vfp.S",
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"arm/gesf2vfp.S",
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"arm/gtdf2vfp.S",
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"arm/gtsf2vfp.S",
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"arm/ledf2vfp.S",
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"arm/lesf2vfp.S",
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"arm/ltdf2vfp.S",
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"arm/ltsf2vfp.S",
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"arm/muldf3vfp.S",
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"arm/mulsf3vfp.S",
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"arm/nedf2vfp.S",
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"arm/nesf2vfp.S",
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"arm/restore_vfp_d8_d15_regs.S",
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"arm/save_vfp_d8_d15_regs.S",
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"arm/subdf3vfp.S",
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"arm/subsf3vfp.S"]);
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}
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sources.extend(&["arm/negdf2vfp.S", "arm/negsf2vfp.S"]);
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}
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if target_arch == "aarch64" {
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sources.extend(&["comparetf2.c",
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"extenddftf2.c",
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"extendsftf2.c",
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"fixtfdi.c",
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"fixtfsi.c",
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"fixtfti.c",
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"fixunstfdi.c",
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"fixunstfsi.c",
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"fixunstfti.c",
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"floatditf.c",
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"floatsitf.c",
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"floatunditf.c",
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"floatunsitf.c",
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"multc3.c",
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"trunctfdf2.c",
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"trunctfsf2.c"]);
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}
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// Remove the assembly implementations that won't compile for the target
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if llvm_target[0] == "thumbv6m" {
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sources.remove(&["aeabi_cdcmp",
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"aeabi_cfcmp",
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"aeabi_dcmp",
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"aeabi_fcmp",
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"clzdi2",
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"clzsi2",
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"comparesf2",
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"divmodsi4",
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"divsi3",
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"modsi3",
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"switch16",
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"switch32",
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"switch8",
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"switchu8",
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"udivmodsi4",
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"udivsi3",
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"umodsi3"]);
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// But use some generic implementations where possible
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sources.extend(&["clzdi2.c", "clzsi2.c"])
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}
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if llvm_target[0] == "thumbv7m" || llvm_target[0] == "thumbv7em" {
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sources.remove(&["aeabi_cdcmp", "aeabi_cfcmp"]);
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}
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let root = if env::var_os("CARGO_FEATURE_RUSTBUILD").is_some() {
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Path::new("../../libcompiler_builtins")
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} else {
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Path::new(".")
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};
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let src_dir = root.join("compiler-rt/compiler-rt-cdylib/compiler-rt/lib/builtins");
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for src in sources.map.values() {
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let src = src_dir.join(src);
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cfg.file(&src);
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println!("cargo:rerun-if-changed={}", src.display());
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}
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cfg.compile("libcompiler-rt.a");
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}
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// To filter away some flaky test (see src/float/add.rs for details)
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if llvm_target[0].starts_with("arm") &&
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llvm_target.last().unwrap().contains("gnueabi") {
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println!("cargo:rustc-cfg=arm_linux")
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}
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// To compile intrinsics.rs for thumb targets, where there is no libc
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if llvm_target[0].starts_with("thumb") {
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println!("cargo:rustc-cfg=thumb")
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}
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// compiler-rt `cfg`s away some intrinsics for thumbv6m because that target doesn't have full
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// THUMBv2 support. We have to cfg our code accordingly.
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if llvm_target[0] == "thumbv6m" {
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println!("cargo:rustc-cfg=thumbv6m")
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}
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}
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