Jordan Rhee
78f544f57d
Support windows/arm target
2018-09-06 09:27:24 -07:00
Tim Neumann
5be54652e9
Fix incorrect names used / generated on ARM
2018-03-27 14:32:01 +02:00
Dan Gohman
a6ecd1a73f
Add "volatile" and "memory" clobber to asm! that doesn't fall through.
...
Use the "volatile" option and the "memory" clobber on inline asm that does
things like return directly, to reduce the chances of compilers rearranging
the code.
2017-11-15 12:49:10 -08:00
Alex Crichton
238647af80
Fix unused imports on iOS
2017-07-03 19:11:34 -07:00
Jorge Aparicio
b8a662040e
no aeabi_mem* symbols on iOS, weak symbols on thumb, normal symbols elsewhere
2017-06-30 18:06:25 -05:00
Jorge Aparicio
75c6ccca71
optimize 32-bit aligned mem{cpy,clr,set} intrinsics for ARM
...
this reduces the execution time of all these routines by 40-70%
2017-06-29 22:40:58 -05:00
Alex Crichton
0ebbcaede4
Enable the intrinsics program on thumb
2017-06-25 10:09:50 -07:00
Alex Crichton
c193113721
Don't test mangled names on thumb
...
We are both the "real compiler-rt" and the "to be tested one".
2017-06-24 12:54:35 -07:00
Alex Crichton
acaa2f071a
Don't check for references to panics with debug assertions
2017-06-24 11:44:50 -07:00
Alex Crichton
d051480eff
Don't generate unmangled aeabi with gen-tests
...
The symbols they delgate to also don't exist...
2017-06-24 11:34:10 -07:00
Alex Crichton
7de57cd4f9
Handle aeabi aliasing
...
Objects in compiler-rt may have two symbols, so this makes sure that we don't
bring in those objects by accident by defining the aliases ourselves.
2017-06-23 15:55:11 -07:00
Alex Crichton
7c4745061a
Remove executable bit on arm.rs
2017-06-23 11:21:15 -07:00
Jorge Aparicio
d34c51f74a
remove arm tests from the old test suite
2017-04-10 16:35:08 -05:00
Wilfried Chauveau
293fef5ebe
impl (unsigned/signed) int to single/double precision float conversion based on llvm algorithms.
2017-03-06 11:55:57 -05:00
Jorge Aparicio
5bb969d8f5
implement float subtraction
...
as a + (-b)
2017-02-08 10:10:40 -05:00
Jorge Aparicio
dfa7b161aa
use AAPCS calling convention on all aeabi intrinsics
...
also, on ARM, inline(always) the actual implementation of the intrinsics so we
end with code like this:
```
00000000 <__aeabi_dadd>:
(implementation here)
```
instead of "trampolines" like this:
```
00000000 <__aeabi_dadd>:
(shuffle registers)
(call __adddf3)
00000000 <__adddf3>:
(implementation here)
```
closes #116
2017-02-07 09:41:26 -05:00
Jorge Aparicio
a1caa7ccac
add implementations of memcpy et al
...
behind the "mem" Cargo feature, which used to be named "weak"
fixes #126
2016-12-17 23:06:37 -05:00
Jorge Aparicio
f77ca915c4
add an opt-in cargo feature to build intrinsics from compiler-rt source
...
closes #63
cc #66
2016-09-29 16:06:24 -05:00
homunkulus
d5e38beef9
Auto merge of #71 - japaric:aeabi-aliases, r=japaric
...
add missing aeabi aliases
2016-09-22 22:55:43 +00:00
Jorge Aparicio
d34be6ab4e
add missing aeabi aliases
2016-09-22 17:02:36 -05:00
Jorge Aparicio
bfa92a862b
avoid division overflow in idivmod test
2016-09-22 10:32:15 -05:00
Matt Ickstadt
6f0d50ebea
Move integer functions to separate module
2016-08-20 15:55:06 -05:00
Amanieu d'Antras
b9e916c769
Add tests for ARM division builtins
2016-08-19 12:13:02 +01:00
Amanieu d'Antras
f919660be5
Add signed division functions
2016-08-19 12:13:02 +01:00
Amanieu d'Antras
97217e3ad9
Fix inline assembly to work on ARMv6-M
2016-08-13 17:29:38 +01:00
Amanieu d'Antras
acceaa95f1
Various changes
2016-08-13 09:56:40 +01:00
Jorge Aparicio
d6be95a3bb
note about calling convention
2016-08-11 00:36:19 -05:00
Jorge Aparicio
cc9d3e8e5f
port __udivmodsi4, aeabi_uidivmod and udivsi3
...
also rewrite these last two new aeabi intrinsics as naked functions
2016-08-11 00:26:16 -05:00
Jorge Aparicio
950564607d
port udivmoddi4 and __aeabi_uldivmod
2016-08-11 00:26:12 -05:00
Amanieu d'Antras
a147763c19
Remove builtins that are not called by LLVM
2016-08-08 08:25:11 +01:00
Amanieu d'Antras
36fb191695
Rewrite the arm mem* builtins without asm and naked functions
2016-08-08 07:25:32 +01:00
Jorge Aparicio
1faf15fc64
initial commit
2016-08-07 15:58:21 -05:00
