From 605b439ad3e5665695eb56efade8ba5bf854a561 Mon Sep 17 00:00:00 2001
From: Alex Crichton <alex@alexcrichton.com>
Date: Fri, 31 Aug 2018 16:00:12 -0700
Subject: [PATCH] Fix compile on riscv again

---
 src/riscv32.rs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/riscv32.rs b/src/riscv32.rs
index 9161a11..9a3c171 100644
--- a/src/riscv32.rs
+++ b/src/riscv32.rs
@@ -3,7 +3,7 @@ intrinsics! {
     // https://raw.githubusercontent.com/gcc-mirror/gcc/master/libgcc/config/epiphany/mulsi3.c
     pub extern "C" fn __mulsi3(a: u32, b: u32) -> u32 {
         let (mut a, mut b) = (a, b);
-        let mut r: usize = 0;
+        let mut r = 0;
 
         while a > 0 {
             if a & 1 > 0 {