Add support for mul[s/d]f3vfp and div[s/d]f3vfp
Here using `"C"` the compiler will use `"aapcs"` or `"aapcs-vfp"` depending on target configuration. Of course this translates in a call to `__aeabi_fdiv` / `__aeabi_fmul` on non-HF targets. On `eabi` targets with +vfpv2/vfpv3 LLVM generate: vmov s0, r1 vmov s2, r0 vdiv.f32 s0, s2, s0 vmov r0, s0 bx lr On `eabihf` targets with +vfpv3-d16/d32/f32 +fp-only-sp LLVM generate: vdiv.f32 s0, s0, s1 bx lr That's exactly what We need for [div/mul][s/d]f3vfp.S
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@ -96,9 +96,9 @@ features = ["c"]
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- [x] arm/aeabi_memset.S
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- [x] arm/aeabi_memset.S
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- [x] arm/aeabi_uidivmod.S
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- [x] arm/aeabi_uidivmod.S
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- [x] arm/aeabi_uldivmod.S
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- [x] arm/aeabi_uldivmod.S
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- [ ] arm/divdf3vfp.S
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- [x] arm/divdf3vfp.S
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- [ ] arm/divmodsi4.S (generic version is done)
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- [ ] arm/divmodsi4.S (generic version is done)
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- [ ] arm/divsf3vfp.S
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- [x] arm/divsf3vfp.S
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- [ ] arm/divsi3.S (generic version is done)
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- [ ] arm/divsi3.S (generic version is done)
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- [ ] arm/eqdf2vfp.S
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- [ ] arm/eqdf2vfp.S
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- [ ] arm/eqsf2vfp.S
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- [ ] arm/eqsf2vfp.S
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@ -120,8 +120,8 @@ features = ["c"]
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- [ ] arm/ltdf2vfp.S
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- [ ] arm/ltdf2vfp.S
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- [ ] arm/ltsf2vfp.S
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- [ ] arm/ltsf2vfp.S
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- [ ] arm/modsi3.S (generic version is done)
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- [ ] arm/modsi3.S (generic version is done)
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- [ ] arm/muldf3vfp.S
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- [x] arm/muldf3vfp.S
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- [ ] arm/mulsf3vfp.S
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- [x] arm/mulsf3vfp.S
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- [ ] arm/nedf2vfp.S
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- [ ] arm/nedf2vfp.S
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- [ ] arm/negdf2vfp.S
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- [ ] arm/negdf2vfp.S
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- [ ] arm/negsf2vfp.S
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- [ ] arm/negsf2vfp.S
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4
build.rs
4
build.rs
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@ -5511,8 +5511,6 @@ mod c {
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&[
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&[
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"arm/adddf3vfp.S",
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"arm/adddf3vfp.S",
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"arm/addsf3vfp.S",
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"arm/addsf3vfp.S",
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"arm/divdf3vfp.S",
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"arm/divsf3vfp.S",
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"arm/eqdf2vfp.S",
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"arm/eqdf2vfp.S",
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"arm/eqsf2vfp.S",
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"arm/eqsf2vfp.S",
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"arm/extendsfdf2vfp.S",
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"arm/extendsfdf2vfp.S",
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@ -5532,8 +5530,6 @@ mod c {
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"arm/lesf2vfp.S",
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"arm/lesf2vfp.S",
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"arm/ltdf2vfp.S",
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"arm/ltdf2vfp.S",
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"arm/ltsf2vfp.S",
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"arm/ltsf2vfp.S",
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"arm/muldf3vfp.S",
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"arm/mulsf3vfp.S",
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"arm/nedf2vfp.S",
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"arm/nedf2vfp.S",
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"arm/nesf2vfp.S",
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"arm/nesf2vfp.S",
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"arm/restore_vfp_d8_d15_regs.S",
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"arm/restore_vfp_d8_d15_regs.S",
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@ -454,4 +454,11 @@ intrinsics! {
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div64(a, b)
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div64(a, b)
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}
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}
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pub extern "C" fn __divsf3vfp(a: f32, b: f32) -> f32 {
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a / b
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}
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pub extern "C" fn __divdf3vfp(a: f64, b: f64) -> f64 {
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a / b
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}
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}
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}
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@ -188,4 +188,12 @@ intrinsics! {
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pub extern "C" fn __muldf3(a: f64, b: f64) -> f64 {
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pub extern "C" fn __muldf3(a: f64, b: f64) -> f64 {
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mul(a, b)
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mul(a, b)
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}
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}
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pub extern "C" fn __mulsf3vfp(a: f32, b: f32) -> f32 {
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a * b
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}
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pub extern "C" fn __muldf3vfp(a: f64, b: f64) -> f64 {
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a * b
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}
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}
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}
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