From 655f642d3f90d59ea008da9254566d4344ed8cba Mon Sep 17 00:00:00 2001 From: Matt Ickstadt Date: Mon, 3 Oct 2016 11:58:16 -0500 Subject: [PATCH 1/3] Add float quickcheck --- build.rs | 4 +- src/float/add.rs | 113 ++++++----------------------------------------- src/float/mod.rs | 78 +++++++++++++++++++------------- src/float/pow.rs | 17 +++---- src/qc.rs | 57 ++++++++++++++++++++++++ 5 files changed, 127 insertions(+), 142 deletions(-) diff --git a/build.rs b/build.rs index c0fdb52..9f7a8fd 100644 --- a/build.rs +++ b/build.rs @@ -424,8 +424,8 @@ fn main() { } // To filter away some flaky test (see src/float/add.rs for details) - if llvm_target.last() == Some(&"gnueabihf") { - println!("cargo:rustc-cfg=gnueabihf") + if llvm_target.last().unwrap().contains("gnueabi") { + println!("cargo:rustc-cfg=gnueabi") } // To compile intrinsics.rs for thumb targets, where there is no libc diff --git a/src/float/add.rs b/src/float/add.rs index 92ba821..814b99b 100644 --- a/src/float/add.rs +++ b/src/float/add.rs @@ -184,114 +184,27 @@ macro_rules! add { add!(__addsf3: f32); add!(__adddf3: f64); -#[cfg(test)] +// NOTE(cfg) for some reason, on arm-unknown-linux-gnueabi*, our implementation doesn't +// match the output of its gcc_s or compiler-rt counterpart. Until we investigate further, we'll +// just avoid testing against them on those targets. Do note that our implementation gives the +// correct answer; gcc_s and compiler-rt are incorrect in this case. +#[cfg(all(test, not(gnueabi)))] mod tests { use core::{f32, f64}; + use qc::{F32, F64}; - use float::{Float, FRepr}; - use qc::{U32, U64}; - - // TODO: Add F32/F64 to qc so that they print the right values (at the very least) check! { fn __addsf3(f: extern fn(f32, f32) -> f32, - a: U32, - b: U32) - -> Option > { - let (a, b) = (f32::from_repr(a.0), f32::from_repr(b.0)); - Some(FRepr(f(a, b))) + a: F32, + b: F32) + -> Option { + Some(F32(f(a.0, b.0))) } fn __adddf3(f: extern fn(f64, f64) -> f64, - a: U64, - b: U64) -> Option > { - let (a, b) = (f64::from_repr(a.0), f64::from_repr(b.0)); - Some(FRepr(f(a, b))) + a: F64, + b: F64) -> Option { + Some(F64(f(a.0, b.0))) } } - - // More tests for special float values - - #[test] - fn test_float_tiny_plus_tiny() { - let tiny = f32::from_repr(1); - let r = super::__addsf3(tiny, tiny); - assert!(r.eq_repr(tiny + tiny)); - } - - #[test] - fn test_double_tiny_plus_tiny() { - let tiny = f64::from_repr(1); - let r = super::__adddf3(tiny, tiny); - assert!(r.eq_repr(tiny + tiny)); - } - - #[test] - fn test_float_small_plus_small() { - let a = f32::from_repr(327); - let b = f32::from_repr(256); - let r = super::__addsf3(a, b); - assert!(r.eq_repr(a + b)); - } - - #[test] - fn test_double_small_plus_small() { - let a = f64::from_repr(327); - let b = f64::from_repr(256); - let r = super::__adddf3(a, b); - assert!(r.eq_repr(a + b)); - } - - #[test] - fn test_float_one_plus_one() { - let r = super::__addsf3(1f32, 1f32); - assert!(r.eq_repr(1f32 + 1f32)); - } - - #[test] - fn test_double_one_plus_one() { - let r = super::__adddf3(1f64, 1f64); - assert!(r.eq_repr(1f64 + 1f64)); - } - - #[test] - fn test_float_different_nan() { - let a = f32::from_repr(1); - let b = f32::from_repr(0b11111111100100010001001010101010); - let x = super::__addsf3(a, b); - let y = a + b; - assert!(x.eq_repr(y)); - } - - #[test] - fn test_double_different_nan() { - let a = f64::from_repr(1); - let b = f64::from_repr(0b1111111111110010001000100101010101001000101010000110100011101011); - let x = super::__adddf3(a, b); - let y = a + b; - assert!(x.eq_repr(y)); - } - - #[test] - fn test_float_nan() { - let r = super::__addsf3(f32::NAN, 1.23); - assert_eq!(r.repr(), f32::NAN.repr()); - } - - #[test] - fn test_double_nan() { - let r = super::__adddf3(f64::NAN, 1.23); - assert_eq!(r.repr(), f64::NAN.repr()); - } - - #[test] - fn test_float_inf() { - let r = super::__addsf3(f32::INFINITY, -123.4); - assert_eq!(r, f32::INFINITY); - } - - #[test] - fn test_double_inf() { - let r = super::__adddf3(f64::INFINITY, -123.4); - assert_eq!(r, f64::INFINITY); - } } diff --git a/src/float/mod.rs b/src/float/mod.rs index 7dc084d..134c32d 100644 --- a/src/float/mod.rs +++ b/src/float/mod.rs @@ -1,6 +1,4 @@ use core::mem; -#[cfg(test)] -use core::fmt; pub mod add; pub mod pow; @@ -16,22 +14,41 @@ pub trait Float: Sized + Copy { /// Returns the bitwidth of the significand fn significand_bits() -> u32; + /// Returns the bitwidth of the exponent + fn exponent_bits() -> u32 { + Self::bits() - Self::significand_bits() - 1 + } + + /// Returns a mask for the sign bit + fn sign_mask() -> Self::Int; + + /// Returns a mask for the significand + fn significand_mask() -> Self::Int; + + /// Returns a mask for the exponent + fn exponent_mask() -> Self::Int; + /// Returns `self` transmuted to `Self::Int` fn repr(self) -> Self::Int; #[cfg(test)] /// Checks if two floats have the same bit representation. *Except* for NaNs! NaN can be - /// represented in multiple different ways. This methods returns `true` if two NaNs are + /// represented in multiple different ways. This method returns `true` if two NaNs are /// compared. fn eq_repr(self, rhs: Self) -> bool; /// Returns a `Self::Int` transmuted back to `Self` fn from_repr(a: Self::Int) -> Self; + /// Constructs a `Self` from its parts. Inputs are treated as bits and shifted into position. + fn from_parts(sign: bool, exponent: Self::Int, significand: Self::Int) -> Self; + /// Returns (normalized exponent, normalized significand) fn normalize(significand: Self::Int) -> (i32, Self::Int); } +// FIXME: Some of this can be removed if RFC Issue #1424 is resolved +// https://github.com/rust-lang/rfcs/issues/1424 impl Float for f32 { type Int = u32; fn bits() -> u32 { @@ -40,6 +57,15 @@ impl Float for f32 { fn significand_bits() -> u32 { 23 } + fn sign_mask() -> Self::Int { + 1 << (Self::bits() - 1) + } + fn significand_mask() -> Self::Int { + (1 << Self::significand_bits()) - 1 + } + fn exponent_mask() -> Self::Int { + !(Self::sign_mask() | Self::significand_mask()) + } fn repr(self) -> Self::Int { unsafe { mem::transmute(self) } } @@ -54,6 +80,11 @@ impl Float for f32 { fn from_repr(a: Self::Int) -> Self { unsafe { mem::transmute(a) } } + fn from_parts(sign: bool, exponent: Self::Int, significand: Self::Int) -> Self { + Self::from_repr(((sign as Self::Int) << (Self::bits() - 1)) | + ((exponent << Self::significand_bits()) & Self::exponent_mask()) | + (significand & Self::significand_mask())) + } fn normalize(significand: Self::Int) -> (i32, Self::Int) { let shift = significand.leading_zeros() .wrapping_sub((1u32 << Self::significand_bits()).leading_zeros()); @@ -68,6 +99,15 @@ impl Float for f64 { fn significand_bits() -> u32 { 52 } + fn sign_mask() -> Self::Int { + 1 << (Self::bits() - 1) + } + fn significand_mask() -> Self::Int { + (1 << Self::significand_bits()) - 1 + } + fn exponent_mask() -> Self::Int { + !(Self::sign_mask() | Self::significand_mask()) + } fn repr(self) -> Self::Int { unsafe { mem::transmute(self) } } @@ -82,36 +122,14 @@ impl Float for f64 { fn from_repr(a: Self::Int) -> Self { unsafe { mem::transmute(a) } } + fn from_parts(sign: bool, exponent: Self::Int, significand: Self::Int) -> Self { + Self::from_repr(((sign as Self::Int) << (Self::bits() - 1)) | + ((exponent << Self::significand_bits()) & Self::exponent_mask()) | + (significand & Self::significand_mask())) + } fn normalize(significand: Self::Int) -> (i32, Self::Int) { let shift = significand.leading_zeros() .wrapping_sub((1u64 << Self::significand_bits()).leading_zeros()); (1i32.wrapping_sub(shift as i32), significand << shift as Self::Int) } } - -// TODO: Move this to F32/F64 in qc.rs -#[cfg(test)] -#[derive(Copy, Clone)] -pub struct FRepr(F); - -#[cfg(test)] -impl PartialEq for FRepr { - fn eq(&self, other: &FRepr) -> bool { - // NOTE(cfg) for some reason, on hard float targets, our implementation doesn't - // match the output of its gcc_s counterpart. Until we investigate further, we'll - // just avoid testing against gcc_s on those targets. Do note that our - // implementation matches the output of the FPU instruction on *hard* float targets - // and matches its gcc_s counterpart on *soft* float targets. - if cfg!(gnueabihf) { - return true - } - self.0.eq_repr(other.0) - } -} - -#[cfg(test)] -impl fmt::Debug for FRepr { - fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result { - self.0.fmt(f) - } -} diff --git a/src/float/pow.rs b/src/float/pow.rs index 838805f..290d0f5 100644 --- a/src/float/pow.rs +++ b/src/float/pow.rs @@ -31,22 +31,19 @@ pow!(__powidf2: f64, i32); #[cfg(test)] mod tests { - use float::{Float, FRepr}; - use qc::{I32, U32, U64}; + use qc::{I32, F32, F64}; check! { fn __powisf2(f: extern fn(f32, i32) -> f32, - a: U32, - b: I32) -> Option > { - let (a, b) = (f32::from_repr(a.0), b.0); - Some(FRepr(f(a, b))) + a: F32, + b: I32) -> Option { + Some(F32(f(a.0, b.0))) } fn __powidf2(f: extern fn(f64, i32) -> f64, - a: U64, - b: I32) -> Option > { - let (a, b) = (f64::from_repr(a.0), b.0); - Some(FRepr(f(a, b))) + a: F64, + b: I32) -> Option { + Some(F64(f(a.0, b.0))) } } } diff --git a/src/qc.rs b/src/qc.rs index f7696b5..74fcb42 100644 --- a/src/qc.rs +++ b/src/qc.rs @@ -5,10 +5,12 @@ use std::boxed::Box; use std::fmt; +use core::{f32, f64}; use quickcheck::{Arbitrary, Gen}; use int::LargeInt; +use float::Float; // Generates values in the full range of the integer type macro_rules! arbitrary { @@ -143,6 +145,61 @@ macro_rules! arbitrary_large { arbitrary_large!(I64: i64); arbitrary_large!(U64: u64); +macro_rules! arbitrary_float { + ($TY:ident : $ty:ident) => { + #[derive(Clone, Copy)] + pub struct $TY(pub $ty); + + impl Arbitrary for $TY { + fn arbitrary(g: &mut G) -> $TY + where G: Gen + { + let special = [ + -0.0, 0.0, $ty::NAN, $ty::INFINITY, -$ty::INFINITY + ]; + + if g.gen_weighted_bool(10) { // Random special case + $TY(*g.choose(&special).unwrap()) + } else if g.gen_weighted_bool(10) { // NaN variants + let sign: bool = g.gen(); + let exponent: <$ty as Float>::Int = g.gen(); + let significand: <$ty as Float>::Int = 0; + $TY($ty::from_parts(sign, exponent, significand)) + } else if g.gen() { // Denormalized + let sign: bool = g.gen(); + let exponent: <$ty as Float>::Int = 0; + let significand: <$ty as Float>::Int = g.gen(); + $TY($ty::from_parts(sign, exponent, significand)) + } else { // Random anything + let sign: bool = g.gen(); + let exponent: <$ty as Float>::Int = g.gen(); + let significand: <$ty as Float>::Int = g.gen(); + $TY($ty::from_parts(sign, exponent, significand)) + } + } + + fn shrink(&self) -> Box> { + ::quickcheck::empty_shrinker() + } + } + + impl fmt::Debug for $TY { + fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result { + fmt::Debug::fmt(&self.0, f) + } + } + + impl PartialEq for $TY { + fn eq(&self, other: &$TY) -> bool { + self.0.eq_repr(other.0) + } + } + } +} + +arbitrary_float!(F32: f32); +arbitrary_float!(F64: f64); + // Convenience macro to test intrinsics against their reference implementations. // // Each intrinsic is tested against both the `gcc_s` library as well as From 77ca63c5119c61a0888df398c7237b3535a989e5 Mon Sep 17 00:00:00 2001 From: Matt Ickstadt Date: Sat, 12 Nov 2016 15:30:57 -0600 Subject: [PATCH 2/3] Use correct lib name in qc test failure --- src/qc.rs | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/qc.rs b/src/qc.rs index 74fcb42..5dbc56f 100644 --- a/src/qc.rs +++ b/src/qc.rs @@ -281,9 +281,9 @@ macro_rules! check { print!("{} - Args: ", stringify!($name)); $(print!("{:?} ", $arg);)* print!("\n"); - println!(" rustc-builtins: {:?}", my_answer); - println!(" compiler_rt: {:?}", compiler_rt_answer); - println!(" gcc_s: {:?}", gcc_s_answer); + println!(" compiler-builtins: {:?}", my_answer); + println!(" compiler_rt: {:?}", compiler_rt_answer); + println!(" gcc_s: {:?}", gcc_s_answer); }; if my_answer != compiler_rt_answer { From f68475e080e5068499e3919d9d6a60d9dc5e3311 Mon Sep 17 00:00:00 2001 From: Matt Ickstadt Date: Sat, 12 Nov 2016 15:31:19 -0600 Subject: [PATCH 3/3] Use better cfg name for arm-linux tests --- build.rs | 5 +++-- src/float/add.rs | 4 ++-- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/build.rs b/build.rs index 9f7a8fd..6e78330 100644 --- a/build.rs +++ b/build.rs @@ -424,8 +424,9 @@ fn main() { } // To filter away some flaky test (see src/float/add.rs for details) - if llvm_target.last().unwrap().contains("gnueabi") { - println!("cargo:rustc-cfg=gnueabi") + if llvm_target[0].starts_with("arm") && + llvm_target.last().unwrap().contains("gnueabi") { + println!("cargo:rustc-cfg=arm_linux") } // To compile intrinsics.rs for thumb targets, where there is no libc diff --git a/src/float/add.rs b/src/float/add.rs index 814b99b..0b2490a 100644 --- a/src/float/add.rs +++ b/src/float/add.rs @@ -184,11 +184,11 @@ macro_rules! add { add!(__addsf3: f32); add!(__adddf3: f64); -// NOTE(cfg) for some reason, on arm-unknown-linux-gnueabi*, our implementation doesn't +// NOTE(cfg) for some reason, on arm*-unknown-linux-gnueabi*, our implementation doesn't // match the output of its gcc_s or compiler-rt counterpart. Until we investigate further, we'll // just avoid testing against them on those targets. Do note that our implementation gives the // correct answer; gcc_s and compiler-rt are incorrect in this case. -#[cfg(all(test, not(gnueabi)))] +#[cfg(all(test, not(arm_linux)))] mod tests { use core::{f32, f64}; use qc::{F32, F64};