M-Labs
/
compiler-builtins-zynq
8
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Fix compilation for thumbv8m.main-none-eabihf 

Some files were not assembling for the Armv8-M Mainline architecture
profile with FPU extension. Reason being the same as for Armv7-M: the
conversion intrinsics including double precision floating
point variables do not work with single precision FPUs.
Also removes from exclusion files that are assembling without errors for
Armv7-M and Armv8-M Mainline.
This commit is contained in:
Hugues de Valon 2019-03-07 19:30:39 +00:00
parent c924aed0b9
commit 85101f2a47
1 changed files with 20 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

28
build.rs
View File

@ -360,24 +360,36 @@ mod c {
}
if llvm_target.last().unwrap().ends_with("eabihf") {
if !llvm_target[0].starts_with("thumbv7em") {
if !llvm_target[0].starts_with("thumbv7em") &&
!llvm_target[0].starts_with("thumbv8m.main") {
// The FPU option chosen for these architectures in cc-rs, ie:
// -mfpu=fpv4-sp-d16 for thumbv7em
// -mfpu=fpv5-sp-d16 for thumbv8m.main
// do not support double precision floating points conversions so the files
// that include such instructions are not included for these targets.
sources.extend(
&[
"arm/fixdfsivfp.S",
"arm/fixsfsivfp.S",
"arm/fixunsdfsivfp.S",
"arm/fixunssfsivfp.S",
"arm/floatsidfvfp.S",
"arm/floatsisfvfp.S",
"arm/floatunssidfvfp.S",
"arm/floatunssisfvfp.S",
"arm/restore_vfp_d8_d15_regs.S",
"arm/save_vfp_d8_d15_regs.S",
],
);
}
sources.extend(&["arm/negdf2vfp.S", "arm/negsf2vfp.S"]);
sources.extend(
&[
"arm/fixsfsivfp.S",
"arm/fixunssfsivfp.S",
"arm/floatsisfvfp.S",
"arm/floatunssisfvfp.S",
"arm/floatunssisfvfp.S",
"arm/restore_vfp_d8_d15_regs.S",
"arm/save_vfp_d8_d15_regs.S",
"arm/negdf2vfp.S",
"arm/negsf2vfp.S",
]
);
}