Remove thumbv6m configuration of intrinsic example
It seems that the intrinsics that were generated for the functions in example/intrinsics.rs where different implementations were given for thumb6m-none-eabi target, have now been implemented in Rust so configuration is not needed anymore.
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@ -19,9 +19,6 @@ extern crate panic_handler;
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#[link(name = "c")]
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#[link(name = "c")]
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extern {}
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extern {}
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// NOTE cfg(not(thumbv6m)) means that the operation is not supported on ARMv6-M at all. Not even
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// compiler-rt provides a C/assembly implementation.
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// Every function in this module maps will be lowered to an intrinsic by LLVM, if the platform
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// Every function in this module maps will be lowered to an intrinsic by LLVM, if the platform
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// doesn't have native support for the operation used in the function. ARM has a naming convention
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// doesn't have native support for the operation used in the function. ARM has a naming convention
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// convention for its intrinsics that's different from other architectures; that's why some function
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// convention for its intrinsics that's different from other architectures; that's why some function
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@ -39,70 +36,40 @@ mod intrinsics {
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}
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}
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// fixdfdi
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// fixdfdi
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#[cfg(not(thumbv6m))]
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pub fn aeabi_d2l(x: f64) -> i64 {
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pub fn aeabi_d2l(x: f64) -> i64 {
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x as i64
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x as i64
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}
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}
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#[cfg(thumbv6m)]
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pub fn aeabi_d2l(_: f64) -> i64 {
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0
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}
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// fixunsdfsi
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// fixunsdfsi
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pub fn aeabi_d2uiz(x: f64) -> u32 {
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pub fn aeabi_d2uiz(x: f64) -> u32 {
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x as u32
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x as u32
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}
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}
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// fixunsdfdi
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// fixunsdfdi
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#[cfg(not(thumbv6m))]
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pub fn aeabi_d2ulz(x: f64) -> u64 {
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pub fn aeabi_d2ulz(x: f64) -> u64 {
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x as u64
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x as u64
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}
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}
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#[cfg(thumbv6m)]
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pub fn aeabi_d2ulz(_: f64) -> u64 {
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0
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}
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// adddf3
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// adddf3
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pub fn aeabi_dadd(a: f64, b: f64) -> f64 {
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pub fn aeabi_dadd(a: f64, b: f64) -> f64 {
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a + b
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a + b
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}
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}
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// eqdf2
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// eqdf2
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#[cfg(not(thumbv6m))]
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pub fn aeabi_dcmpeq(a: f64, b: f64) -> bool {
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pub fn aeabi_dcmpeq(a: f64, b: f64) -> bool {
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a == b
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a == b
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}
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}
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#[cfg(thumbv6m)]
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pub fn aeabi_dcmpeq(_: f64, _: f64) -> bool {
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true
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}
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// gtdf2
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// gtdf2
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#[cfg(not(thumbv6m))]
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pub fn aeabi_dcmpgt(a: f64, b: f64) -> bool {
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pub fn aeabi_dcmpgt(a: f64, b: f64) -> bool {
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a > b
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a > b
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}
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}
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#[cfg(thumbv6m)]
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pub fn aeabi_dcmpgt(_: f64, _: f64) -> bool {
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true
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}
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// ltdf2
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// ltdf2
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#[cfg(not(thumbv6m))]
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pub fn aeabi_dcmplt(a: f64, b: f64) -> bool {
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pub fn aeabi_dcmplt(a: f64, b: f64) -> bool {
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a < b
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a < b
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}
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}
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#[cfg(thumbv6m)]
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pub fn aeabi_dcmplt(_: f64, _: f64) -> bool {
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true
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}
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// divdf3
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// divdf3
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pub fn aeabi_ddiv(a: f64, b: f64) -> f64 {
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pub fn aeabi_ddiv(a: f64, b: f64) -> f64 {
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a / b
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a / b
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@ -129,70 +96,40 @@ mod intrinsics {
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}
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}
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// fixsfdi
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// fixsfdi
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#[cfg(not(thumbv6m))]
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pub fn aeabi_f2lz(x: f32) -> i64 {
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pub fn aeabi_f2lz(x: f32) -> i64 {
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x as i64
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x as i64
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}
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}
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#[cfg(thumbv6m)]
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pub fn aeabi_f2lz(_: f32) -> i64 {
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0
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}
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// fixunssfsi
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// fixunssfsi
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pub fn aeabi_f2uiz(x: f32) -> u32 {
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pub fn aeabi_f2uiz(x: f32) -> u32 {
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x as u32
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x as u32
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}
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}
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// fixunssfdi
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// fixunssfdi
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#[cfg(not(thumbv6m))]
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pub fn aeabi_f2ulz(x: f32) -> u64 {
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pub fn aeabi_f2ulz(x: f32) -> u64 {
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x as u64
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x as u64
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}
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}
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#[cfg(thumbv6m)]
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pub fn aeabi_f2ulz(_: f32) -> u64 {
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0
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}
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// addsf3
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// addsf3
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pub fn aeabi_fadd(a: f32, b: f32) -> f32 {
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pub fn aeabi_fadd(a: f32, b: f32) -> f32 {
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a + b
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a + b
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}
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}
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// eqsf2
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// eqsf2
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#[cfg(not(thumbv6m))]
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pub fn aeabi_fcmpeq(a: f32, b: f32) -> bool {
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pub fn aeabi_fcmpeq(a: f32, b: f32) -> bool {
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a == b
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a == b
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}
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}
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#[cfg(thumbv6m)]
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pub fn aeabi_fcmpeq(_: f32, _: f32) -> bool {
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true
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}
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// gtsf2
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// gtsf2
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#[cfg(not(thumbv6m))]
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pub fn aeabi_fcmpgt(a: f32, b: f32) -> bool {
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pub fn aeabi_fcmpgt(a: f32, b: f32) -> bool {
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a > b
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a > b
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}
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}
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#[cfg(thumbv6m)]
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pub fn aeabi_fcmpgt(_: f32, _: f32) -> bool {
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true
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}
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// ltsf2
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// ltsf2
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#[cfg(not(thumbv6m))]
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pub fn aeabi_fcmplt(a: f32, b: f32) -> bool {
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pub fn aeabi_fcmplt(a: f32, b: f32) -> bool {
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a < b
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a < b
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}
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}
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#[cfg(thumbv6m)]
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pub fn aeabi_fcmplt(_: f32, _: f32) -> bool {
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true
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}
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// divsf3
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// divsf3
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pub fn aeabi_fdiv(a: f32, b: f32) -> f32 {
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pub fn aeabi_fdiv(a: f32, b: f32) -> f32 {
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a / b
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a / b
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