compiler-builtins-zynq/src/lib.rs

107 lines
2.1 KiB
Rust
Raw Normal View History

2016-08-08 04:58:05 +08:00
#![feature(asm)]
2016-08-16 10:08:04 +08:00
#![feature(core_intrinsics)]
#![feature(linkage)]
2016-08-08 04:58:05 +08:00
#![feature(naked_functions)]
#![cfg_attr(not(test), no_std)]
2016-08-14 01:16:52 +08:00
#![no_builtins]
2016-08-08 04:58:05 +08:00
// TODO(rust-lang/rust#35021) uncomment when that PR lands
// #![feature(rustc_builtins)]
2016-08-13 16:51:54 +08:00
// We disable #[no_mangle] for tests so that we can verify the test results
// against the native compiler-rt implementations of the builtins.
// NOTE cfg(all(feature = "c", ..)) indicate that compiler-rt provides an arch optimized
// implementation of that intrinsic and we'll prefer to use that
macro_rules! udiv {
($a:expr, $b:expr) => {
unsafe {
let a = $a;
let b = $b;
if b == 0 {
intrinsics::abort()
} else {
intrinsics::unchecked_div(a, b)
}
}
}
}
macro_rules! sdiv {
($sty:ident, $a:expr, $b:expr) => {
unsafe {
let a = $a;
let b = $b;
if b == 0 || (b == -1 && a == $sty::min_value()) {
intrinsics::abort()
} else {
intrinsics::unchecked_div(a, b)
}
}
}
}
macro_rules! urem {
($a:expr, $b:expr) => {
unsafe {
let a = $a;
let b = $b;
if b == 0 {
intrinsics::abort()
} else {
intrinsics::unchecked_rem(a, b)
}
}
}
}
macro_rules! srem {
($sty:ty, $a:expr, $b:expr) => {
unsafe {
let a = $a;
let b = $b;
if b == 0 || (b == -1 && a == $sty::min_value()) {
intrinsics::abort()
} else {
intrinsics::unchecked_rem(a, b)
}
}
}
}
2016-08-11 08:12:37 +08:00
#[cfg(test)]
#[macro_use]
extern crate quickcheck;
2016-08-08 04:58:05 +08:00
#[cfg(test)]
extern crate core;
#[cfg(test)]
extern crate gcc_s;
#[cfg(test)]
extern crate compiler_rt;
#[cfg(test)]
extern crate rand;
#[cfg(feature = "weak")]
2016-08-15 10:59:48 +08:00
extern crate rlibc;
#[cfg(test)]
#[macro_use]
mod qc;
pub mod int;
2016-08-18 04:51:37 +08:00
pub mod float;
2016-08-08 04:58:05 +08:00
#[cfg(target_arch = "arm")]
pub mod arm;
2016-08-17 06:46:46 +08:00
#[cfg(target_arch = "x86_64")]
pub mod x86_64;