2019-08-20 05:02:08 +08:00
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use rand::seq::SliceRandom;
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use rand::Rng;
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2018-02-01 02:04:01 +08:00
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use std::collections::HashMap;
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2019-05-15 05:33:08 +08:00
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use std::fmt;
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2018-02-01 02:04:01 +08:00
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use std::fmt::Write as FmtWrite;
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use std::fs::{self, OpenOptions};
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use std::hash::{Hash, Hasher};
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2019-05-15 05:33:08 +08:00
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use std::io::Write;
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2018-02-01 02:04:01 +08:00
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use std::path::PathBuf;
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use std::{env, mem};
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const NTESTS: usize = 1_000;
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fn main() {
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let out_dir = PathBuf::from(env::var_os("OUT_DIR").unwrap());
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let out_file = out_dir.join("generated.rs");
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drop(fs::remove_file(&out_file));
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let target = env::var("TARGET").unwrap();
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2019-05-15 05:33:08 +08:00
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let target_arch_arm = target.contains("arm") || target.contains("thumb");
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2018-02-01 02:04:01 +08:00
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let target_arch_mips = target.contains("mips");
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// TODO accept NaNs. We don't do that right now because we can't check
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// for NaN-ness on the thumb targets (due to missing intrinsics)
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// float/add.rs
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2019-05-15 05:33:08 +08:00
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gen(
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|(a, b): (MyF64, MyF64)| {
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2018-02-01 02:04:01 +08:00
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let c = a.0 + b.0;
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if a.0.is_nan() || b.0.is_nan() || c.is_nan() {
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None
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} else {
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Some(c)
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}
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},
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2019-05-15 05:33:08 +08:00
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"builtins::float::add::__adddf3(a, b)",
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);
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gen(
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|(a, b): (MyF32, MyF32)| {
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2018-02-01 02:04:01 +08:00
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let c = a.0 + b.0;
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if a.0.is_nan() || b.0.is_nan() || c.is_nan() {
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None
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} else {
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Some(c)
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}
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},
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2019-05-15 05:33:08 +08:00
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"builtins::float::add::__addsf3(a, b)",
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);
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2018-02-01 02:04:01 +08:00
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2018-02-05 01:34:31 +08:00
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if target_arch_arm {
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2019-05-15 05:33:08 +08:00
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gen(
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|(a, b): (MyF64, MyF64)| {
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2018-02-05 01:34:31 +08:00
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let c = a.0 + b.0;
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if a.0.is_nan() || b.0.is_nan() || c.is_nan() {
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None
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} else {
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Some(c)
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}
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},
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2019-05-15 05:33:08 +08:00
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"builtins::float::add::__adddf3vfp(a, b)",
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);
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gen(
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|(a, b): (LargeF32, LargeF32)| {
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2018-02-05 01:34:31 +08:00
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let c = a.0 + b.0;
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if a.0.is_nan() || b.0.is_nan() || c.is_nan() {
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None
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} else {
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Some(c)
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}
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},
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2019-05-15 05:33:08 +08:00
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"builtins::float::add::__addsf3vfp(a, b)",
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);
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2018-02-05 01:34:31 +08:00
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}
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2018-02-01 02:04:01 +08:00
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// float/cmp.rs
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2019-05-15 05:33:08 +08:00
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gen(
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|(a, b): (MyF64, MyF64)| {
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2018-02-01 02:04:01 +08:00
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let (a, b) = (a.0, b.0);
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if a.is_nan() || b.is_nan() {
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return None;
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}
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if a.is_nan() || b.is_nan() {
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Some(-1)
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} else if a < b {
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Some(-1)
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} else if a > b {
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Some(1)
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} else {
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Some(0)
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}
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},
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2019-05-15 05:33:08 +08:00
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"builtins::float::cmp::__gedf2(a, b)",
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);
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gen(
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|(a, b): (MyF32, MyF32)| {
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2018-02-01 02:04:01 +08:00
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let (a, b) = (a.0, b.0);
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if a.is_nan() || b.is_nan() {
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return None;
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}
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if a.is_nan() || b.is_nan() {
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Some(-1)
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} else if a < b {
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Some(-1)
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} else if a > b {
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Some(1)
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} else {
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Some(0)
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}
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},
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2019-05-15 05:33:08 +08:00
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"builtins::float::cmp::__gesf2(a, b)",
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);
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gen(
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|(a, b): (MyF64, MyF64)| {
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2018-02-01 02:04:01 +08:00
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let (a, b) = (a.0, b.0);
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if a.is_nan() || b.is_nan() {
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return None;
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}
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if a.is_nan() || b.is_nan() {
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Some(1)
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} else if a < b {
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Some(-1)
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} else if a > b {
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Some(1)
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} else {
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Some(0)
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}
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},
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2019-05-15 05:33:08 +08:00
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"builtins::float::cmp::__ledf2(a, b)",
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);
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gen(
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|(a, b): (MyF32, MyF32)| {
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2018-02-01 02:04:01 +08:00
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let (a, b) = (a.0, b.0);
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if a.is_nan() || b.is_nan() {
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return None;
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}
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if a.is_nan() || b.is_nan() {
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Some(1)
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} else if a < b {
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Some(-1)
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} else if a > b {
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Some(1)
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} else {
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Some(0)
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}
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},
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2019-05-15 05:33:08 +08:00
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"builtins::float::cmp::__lesf2(a, b)",
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);
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2018-02-01 02:04:01 +08:00
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2019-05-15 05:33:08 +08:00
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gen(
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|(a, b): (MyF32, MyF32)| {
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2018-02-26 01:35:36 +08:00
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let c = a.0.is_nan() || b.0.is_nan();
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Some(c as i32)
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},
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2019-05-15 05:33:08 +08:00
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"builtins::float::cmp::__unordsf2(a, b)",
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);
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2018-02-26 01:35:36 +08:00
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2019-05-15 05:33:08 +08:00
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gen(
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|(a, b): (MyF64, MyF64)| {
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2018-02-26 01:35:36 +08:00
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let c = a.0.is_nan() || b.0.is_nan();
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Some(c as i32)
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},
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2019-05-15 05:33:08 +08:00
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"builtins::float::cmp::__unorddf2(a, b)",
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);
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2018-02-26 01:35:36 +08:00
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2018-02-04 16:48:06 +08:00
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if target_arch_arm {
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2019-05-15 05:33:08 +08:00
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gen(
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|(a, b): (MyF32, MyF32)| {
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2018-02-04 16:48:06 +08:00
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if a.0.is_nan() || b.0.is_nan() {
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return None;
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}
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let c = (a.0 <= b.0) as i32;
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Some(c)
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},
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2019-05-15 05:33:08 +08:00
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"builtins::float::cmp::__aeabi_fcmple(a, b)",
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);
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2018-02-04 16:48:06 +08:00
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2019-05-15 05:33:08 +08:00
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gen(
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|(a, b): (MyF32, MyF32)| {
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2018-02-04 16:48:06 +08:00
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if a.0.is_nan() || b.0.is_nan() {
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return None;
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}
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let c = (a.0 >= b.0) as i32;
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Some(c)
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},
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2019-05-15 05:33:08 +08:00
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"builtins::float::cmp::__aeabi_fcmpge(a, b)",
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);
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2018-02-04 16:48:06 +08:00
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2019-05-15 05:33:08 +08:00
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gen(
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|(a, b): (MyF32, MyF32)| {
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2018-02-04 16:48:06 +08:00
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if a.0.is_nan() || b.0.is_nan() {
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return None;
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}
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let c = (a.0 == b.0) as i32;
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Some(c)
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},
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2019-05-15 05:33:08 +08:00
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"builtins::float::cmp::__aeabi_fcmpeq(a, b)",
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);
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2018-02-04 16:48:06 +08:00
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2019-05-15 05:33:08 +08:00
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gen(
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|(a, b): (MyF32, MyF32)| {
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2018-02-04 16:48:06 +08:00
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if a.0.is_nan() || b.0.is_nan() {
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return None;
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}
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let c = (a.0 < b.0) as i32;
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Some(c)
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},
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2019-05-15 05:33:08 +08:00
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"builtins::float::cmp::__aeabi_fcmplt(a, b)",
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);
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2018-02-04 16:48:06 +08:00
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2019-05-15 05:33:08 +08:00
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gen(
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|(a, b): (MyF32, MyF32)| {
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2018-02-04 16:48:06 +08:00
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if a.0.is_nan() || b.0.is_nan() {
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return None;
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}
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let c = (a.0 > b.0) as i32;
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Some(c)
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},
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2019-05-15 05:33:08 +08:00
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"builtins::float::cmp::__aeabi_fcmpgt(a, b)",
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);
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2018-02-04 16:48:06 +08:00
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2019-05-15 05:33:08 +08:00
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gen(
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|(a, b): (MyF64, MyF64)| {
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2018-02-04 16:48:06 +08:00
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if a.0.is_nan() || b.0.is_nan() {
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return None;
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}
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let c = (a.0 <= b.0) as i32;
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Some(c)
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},
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2019-05-15 05:33:08 +08:00
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"builtins::float::cmp::__aeabi_dcmple(a, b)",
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);
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2018-02-04 16:48:06 +08:00
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2019-05-15 05:33:08 +08:00
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gen(
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|(a, b): (MyF64, MyF64)| {
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2018-02-04 16:48:06 +08:00
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if a.0.is_nan() || b.0.is_nan() {
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return None;
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}
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let c = (a.0 >= b.0) as i32;
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Some(c)
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},
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2019-05-15 05:33:08 +08:00
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"builtins::float::cmp::__aeabi_dcmpge(a, b)",
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);
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2018-02-04 16:48:06 +08:00
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2019-05-15 05:33:08 +08:00
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gen(
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|(a, b): (MyF64, MyF64)| {
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2018-02-04 16:48:06 +08:00
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if a.0.is_nan() || b.0.is_nan() {
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return None;
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}
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let c = (a.0 == b.0) as i32;
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Some(c)
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},
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2019-05-15 05:33:08 +08:00
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"builtins::float::cmp::__aeabi_dcmpeq(a, b)",
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);
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2018-02-04 16:48:06 +08:00
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2019-05-15 05:33:08 +08:00
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gen(
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|(a, b): (MyF64, MyF64)| {
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2018-02-04 16:48:06 +08:00
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if a.0.is_nan() || b.0.is_nan() {
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return None;
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}
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let c = (a.0 < b.0) as i32;
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Some(c)
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},
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2019-05-15 05:33:08 +08:00
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"builtins::float::cmp::__aeabi_dcmplt(a, b)",
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);
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2018-02-04 16:48:06 +08:00
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2019-05-15 05:33:08 +08:00
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gen(
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|(a, b): (MyF64, MyF64)| {
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2018-02-04 16:48:06 +08:00
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if a.0.is_nan() || b.0.is_nan() {
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return None;
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}
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let c = (a.0 > b.0) as i32;
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Some(c)
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},
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2019-05-15 05:33:08 +08:00
|
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"builtins::float::cmp::__aeabi_dcmpgt(a, b)",
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);
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2018-02-12 06:46:56 +08:00
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2019-05-15 05:33:08 +08:00
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gen(
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|(a, b): (LargeF32, LargeF32)| {
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2018-02-12 06:46:56 +08:00
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if a.0.is_nan() || b.0.is_nan() {
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return None;
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}
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Some((a.0 >= b.0) as i32)
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},
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2019-05-15 05:33:08 +08:00
|
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"builtins::float::cmp::__gesf2vfp(a, b)",
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);
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gen(
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|(a, b): (MyF64, MyF64)| {
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2018-02-12 06:46:56 +08:00
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if a.0.is_nan() || b.0.is_nan() {
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return None;
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}
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Some((a.0 >= b.0) as i32)
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},
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2019-05-15 05:33:08 +08:00
|
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"builtins::float::cmp::__gedf2vfp(a, b)",
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);
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gen(
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|(a, b): (LargeF32, LargeF32)| {
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2018-02-12 06:46:56 +08:00
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if a.0.is_nan() || b.0.is_nan() {
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return None;
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}
|
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Some((a.0 > b.0) as i32)
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},
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2019-05-15 05:33:08 +08:00
|
|
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"builtins::float::cmp::__gtsf2vfp(a, b)",
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);
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gen(
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|(a, b): (MyF64, MyF64)| {
|
2018-02-12 06:46:56 +08:00
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if a.0.is_nan() || b.0.is_nan() {
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return None;
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}
|
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Some((a.0 > b.0) as i32)
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},
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2019-05-15 05:33:08 +08:00
|
|
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"builtins::float::cmp::__gtdf2vfp(a, b)",
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);
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gen(
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|
|
|(a, b): (LargeF32, LargeF32)| {
|
2018-02-12 06:46:56 +08:00
|
|
|
if a.0.is_nan() || b.0.is_nan() {
|
|
|
|
return None;
|
|
|
|
}
|
|
|
|
Some((a.0 < b.0) as i32)
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::cmp::__ltsf2vfp(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyF64, MyF64)| {
|
2018-02-12 06:46:56 +08:00
|
|
|
if a.0.is_nan() || b.0.is_nan() {
|
|
|
|
return None;
|
|
|
|
}
|
|
|
|
Some((a.0 < b.0) as i32)
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::cmp::__ltdf2vfp(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (LargeF32, LargeF32)| {
|
2018-02-26 00:50:56 +08:00
|
|
|
if a.0.is_nan() || b.0.is_nan() {
|
|
|
|
return None;
|
|
|
|
}
|
|
|
|
Some((a.0 <= b.0) as i32)
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::cmp::__lesf2vfp(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyF64, MyF64)| {
|
2018-02-26 00:50:56 +08:00
|
|
|
if a.0.is_nan() || b.0.is_nan() {
|
|
|
|
return None;
|
|
|
|
}
|
|
|
|
Some((a.0 <= b.0) as i32)
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::cmp::__ledf2vfp(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (LargeF32, LargeF32)| {
|
2018-02-12 06:46:56 +08:00
|
|
|
if a.0.is_nan() || b.0.is_nan() {
|
|
|
|
return None;
|
|
|
|
}
|
|
|
|
Some((a.0 != b.0) as i32)
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::cmp::__nesf2vfp(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyF64, MyF64)| {
|
2018-02-12 06:46:56 +08:00
|
|
|
if a.0.is_nan() || b.0.is_nan() {
|
|
|
|
return None;
|
|
|
|
}
|
|
|
|
Some((a.0 != b.0) as i32)
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::cmp::__nedf2vfp(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (LargeF32, LargeF32)| {
|
2018-02-12 06:46:56 +08:00
|
|
|
if a.0.is_nan() || b.0.is_nan() {
|
|
|
|
return None;
|
|
|
|
}
|
|
|
|
Some((a.0 == b.0) as i32)
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::cmp::__eqsf2vfp(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyF64, MyF64)| {
|
2018-02-12 06:46:56 +08:00
|
|
|
if a.0.is_nan() || b.0.is_nan() {
|
|
|
|
return None;
|
|
|
|
}
|
|
|
|
Some((a.0 == b.0) as i32)
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::cmp::__eqdf2vfp(a, b)",
|
|
|
|
);
|
2018-02-04 16:48:06 +08:00
|
|
|
}
|
|
|
|
|
2018-02-09 01:20:45 +08:00
|
|
|
// float/extend.rs
|
2019-05-15 05:33:08 +08:00
|
|
|
gen(
|
|
|
|
|a: MyF32| {
|
2018-02-09 01:20:45 +08:00
|
|
|
if a.0.is_nan() {
|
|
|
|
return None;
|
|
|
|
}
|
2019-08-20 05:02:08 +08:00
|
|
|
Some(f64::from(a.0))
|
2018-02-09 01:20:45 +08:00
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::extend::__extendsfdf2(a)",
|
|
|
|
);
|
2018-02-12 06:46:56 +08:00
|
|
|
if target_arch_arm {
|
2019-05-15 05:33:08 +08:00
|
|
|
gen(
|
|
|
|
|a: LargeF32| {
|
|
|
|
if a.0.is_nan() {
|
|
|
|
return None;
|
|
|
|
}
|
2019-08-20 05:02:08 +08:00
|
|
|
Some(f64::from(a.0))
|
2019-05-15 05:33:08 +08:00
|
|
|
},
|
|
|
|
"builtins::float::extend::__extendsfdf2vfp(a)",
|
|
|
|
);
|
2018-02-12 06:46:56 +08:00
|
|
|
}
|
2018-02-09 01:20:45 +08:00
|
|
|
|
2018-02-01 02:04:01 +08:00
|
|
|
// float/conv.rs
|
2019-05-15 05:33:08 +08:00
|
|
|
gen(
|
2019-08-20 05:02:08 +08:00
|
|
|
|a: MyF64| i64::cast(a.0),
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::conv::__fixdfdi(a)",
|
|
|
|
);
|
|
|
|
gen(
|
2019-08-20 05:02:08 +08:00
|
|
|
|a: MyF64| i32::cast(a.0),
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::conv::__fixdfsi(a)",
|
|
|
|
);
|
|
|
|
gen(
|
2019-08-20 05:02:08 +08:00
|
|
|
|a: MyF32| i64::cast(a.0),
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::conv::__fixsfdi(a)",
|
|
|
|
);
|
|
|
|
gen(
|
2019-08-20 05:02:08 +08:00
|
|
|
|a: MyF32| i32::cast(a.0),
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::conv::__fixsfsi(a)",
|
|
|
|
);
|
|
|
|
gen(
|
2019-08-20 05:02:08 +08:00
|
|
|
|a: MyF32| i128::cast(a.0),
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::conv::__fixsfti(a)",
|
|
|
|
);
|
|
|
|
gen(
|
2019-08-20 05:02:08 +08:00
|
|
|
|a: MyF64| i128::cast(a.0),
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::conv::__fixdfti(a)",
|
|
|
|
);
|
|
|
|
gen(
|
2019-08-20 05:02:08 +08:00
|
|
|
|a: MyF64| u64::cast(a.0),
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::conv::__fixunsdfdi(a)",
|
|
|
|
);
|
|
|
|
gen(
|
2019-08-20 05:02:08 +08:00
|
|
|
|a: MyF64| u32::cast(a.0),
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::conv::__fixunsdfsi(a)",
|
|
|
|
);
|
|
|
|
gen(
|
2019-08-20 05:02:08 +08:00
|
|
|
|a: MyF32| u64::cast(a.0),
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::conv::__fixunssfdi(a)",
|
|
|
|
);
|
|
|
|
gen(
|
2019-08-20 05:02:08 +08:00
|
|
|
|a: MyF32| u32::cast(a.0),
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::conv::__fixunssfsi(a)",
|
|
|
|
);
|
|
|
|
gen(
|
2019-08-20 05:02:08 +08:00
|
|
|
|a: MyF32| u128::cast(a.0),
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::conv::__fixunssfti(a)",
|
|
|
|
);
|
|
|
|
gen(
|
2019-08-20 05:02:08 +08:00
|
|
|
|a: MyF64| u128::cast(a.0),
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::conv::__fixunsdfti(a)",
|
|
|
|
);
|
|
|
|
gen(
|
2019-08-20 05:02:08 +08:00
|
|
|
|a: MyI64| Some(a.0 as f64),
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::conv::__floatdidf(a)",
|
|
|
|
);
|
|
|
|
gen(
|
2019-08-20 05:02:08 +08:00
|
|
|
|a: MyI32| Some(a.0 as f64),
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::conv::__floatsidf(a)",
|
|
|
|
);
|
|
|
|
gen(
|
2019-08-20 05:02:08 +08:00
|
|
|
|a: MyI32| Some(a.0 as f32),
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::conv::__floatsisf(a)",
|
|
|
|
);
|
|
|
|
gen(
|
2019-08-20 05:02:08 +08:00
|
|
|
|a: MyU64| Some(a.0 as f64),
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::conv::__floatundidf(a)",
|
|
|
|
);
|
|
|
|
gen(
|
2019-08-20 05:02:08 +08:00
|
|
|
|a: MyU32| Some(a.0 as f64),
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::conv::__floatunsidf(a)",
|
|
|
|
);
|
|
|
|
gen(
|
2019-08-20 05:02:08 +08:00
|
|
|
|a: MyU32| Some(a.0 as f32),
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::conv::__floatunsisf(a)",
|
|
|
|
);
|
|
|
|
gen(
|
2019-08-20 05:02:08 +08:00
|
|
|
|a: MyU128| Some(a.0 as f32),
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::conv::__floatuntisf(a)",
|
|
|
|
);
|
2018-02-01 02:04:01 +08:00
|
|
|
if !target_arch_mips {
|
2019-05-15 05:33:08 +08:00
|
|
|
gen(
|
2019-08-20 05:02:08 +08:00
|
|
|
|a: MyI128| Some(a.0 as f32),
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::conv::__floattisf(a)",
|
|
|
|
);
|
|
|
|
gen(
|
2019-08-20 05:02:08 +08:00
|
|
|
|a: MyI128| Some(a.0 as f64),
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::conv::__floattidf(a)",
|
|
|
|
);
|
|
|
|
gen(
|
2019-08-20 05:02:08 +08:00
|
|
|
|a: MyU128| Some(a.0 as f64),
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::conv::__floatuntidf(a)",
|
|
|
|
);
|
2018-02-01 02:04:01 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
// float/pow.rs
|
2019-05-15 05:33:08 +08:00
|
|
|
gen(
|
|
|
|
|(a, b): (MyF64, MyI32)| {
|
|
|
|
let c = a.0.powi(b.0);
|
|
|
|
if a.0.is_nan() || c.is_nan() {
|
|
|
|
None
|
|
|
|
} else {
|
2018-02-01 02:04:01 +08:00
|
|
|
Some(c)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::pow::__powidf2(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyF32, MyI32)| {
|
|
|
|
let c = a.0.powi(b.0);
|
|
|
|
if a.0.is_nan() || c.is_nan() {
|
|
|
|
None
|
|
|
|
} else {
|
2018-02-01 02:04:01 +08:00
|
|
|
Some(c)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::pow::__powisf2(a, b)",
|
|
|
|
);
|
2018-02-01 02:04:01 +08:00
|
|
|
|
|
|
|
// float/sub.rs
|
2019-05-15 05:33:08 +08:00
|
|
|
gen(
|
|
|
|
|(a, b): (MyF64, MyF64)| {
|
2018-02-01 02:04:01 +08:00
|
|
|
let c = a.0 - b.0;
|
|
|
|
if a.0.is_nan() || b.0.is_nan() || c.is_nan() {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(c)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::sub::__subdf3(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyF32, MyF32)| {
|
2018-02-01 02:04:01 +08:00
|
|
|
let c = a.0 - b.0;
|
|
|
|
if a.0.is_nan() || b.0.is_nan() || c.is_nan() {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(c)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::sub::__subsf3(a, b)",
|
|
|
|
);
|
2018-02-01 02:04:01 +08:00
|
|
|
|
2018-02-05 01:34:31 +08:00
|
|
|
if target_arch_arm {
|
2019-05-15 05:33:08 +08:00
|
|
|
gen(
|
|
|
|
|(a, b): (MyF64, MyF64)| {
|
2018-02-05 01:34:31 +08:00
|
|
|
let c = a.0 - b.0;
|
|
|
|
if a.0.is_nan() || b.0.is_nan() || c.is_nan() {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(c)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::sub::__subdf3vfp(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (LargeF32, LargeF32)| {
|
2018-02-05 01:34:31 +08:00
|
|
|
let c = a.0 - b.0;
|
|
|
|
if a.0.is_nan() || b.0.is_nan() || c.is_nan() {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(c)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::sub::__subsf3vfp(a, b)",
|
|
|
|
);
|
2018-02-05 01:34:31 +08:00
|
|
|
}
|
|
|
|
|
2018-02-01 02:04:01 +08:00
|
|
|
// float/mul.rs
|
2019-05-15 05:33:08 +08:00
|
|
|
gen(
|
|
|
|
|(a, b): (MyF64, MyF64)| {
|
2018-02-01 02:04:01 +08:00
|
|
|
let c = a.0 * b.0;
|
|
|
|
if a.0.is_nan() || b.0.is_nan() || c.is_nan() {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(c)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::mul::__muldf3(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (LargeF32, LargeF32)| {
|
2018-02-01 02:04:01 +08:00
|
|
|
let c = a.0 * b.0;
|
|
|
|
if a.0.is_nan() || b.0.is_nan() || c.is_nan() {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(c)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::mul::__mulsf3(a, b)",
|
|
|
|
);
|
2018-02-01 02:04:01 +08:00
|
|
|
|
|
|
|
if target_arch_arm {
|
2019-05-15 05:33:08 +08:00
|
|
|
gen(
|
|
|
|
|(a, b): (MyF64, MyF64)| {
|
2018-02-01 02:04:01 +08:00
|
|
|
let c = a.0 * b.0;
|
|
|
|
if a.0.is_nan() || b.0.is_nan() || c.is_nan() {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(c)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::mul::__muldf3vfp(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (LargeF32, LargeF32)| {
|
2018-02-01 02:04:01 +08:00
|
|
|
let c = a.0 * b.0;
|
|
|
|
if a.0.is_nan() || b.0.is_nan() || c.is_nan() {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(c)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::mul::__mulsf3vfp(a, b)",
|
|
|
|
);
|
2018-02-01 02:04:01 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
// float/div.rs
|
2019-05-15 05:33:08 +08:00
|
|
|
gen(
|
|
|
|
|(a, b): (MyF64, MyF64)| {
|
2018-02-01 02:04:01 +08:00
|
|
|
if b.0 == 0.0 {
|
2019-05-15 05:33:08 +08:00
|
|
|
return None;
|
2018-02-01 02:04:01 +08:00
|
|
|
}
|
|
|
|
let c = a.0 / b.0;
|
2019-05-15 05:33:08 +08:00
|
|
|
if a.0.is_nan()
|
|
|
|
|| b.0.is_nan()
|
|
|
|
|| c.is_nan()
|
|
|
|
|| c.abs() <= unsafe { mem::transmute(4503599627370495u64) }
|
2018-02-01 02:04:01 +08:00
|
|
|
{
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(c)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::div::__divdf3(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (LargeF32, LargeF32)| {
|
2018-02-01 02:04:01 +08:00
|
|
|
if b.0 == 0.0 {
|
2019-05-15 05:33:08 +08:00
|
|
|
return None;
|
2018-02-01 02:04:01 +08:00
|
|
|
}
|
|
|
|
let c = a.0 / b.0;
|
2019-05-15 05:33:08 +08:00
|
|
|
if a.0.is_nan()
|
|
|
|
|| b.0.is_nan()
|
|
|
|
|| c.is_nan()
|
|
|
|
|| c.abs() <= unsafe { mem::transmute(16777215u32) }
|
2018-02-01 02:04:01 +08:00
|
|
|
{
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(c)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::div::__divsf3(a, b)",
|
|
|
|
);
|
2018-02-01 02:04:01 +08:00
|
|
|
|
|
|
|
if target_arch_arm {
|
2019-05-15 05:33:08 +08:00
|
|
|
gen(
|
|
|
|
|(a, b): (MyF64, MyF64)| {
|
2018-02-01 02:04:01 +08:00
|
|
|
if b.0 == 0.0 {
|
2019-05-15 05:33:08 +08:00
|
|
|
return None;
|
2018-02-01 02:04:01 +08:00
|
|
|
}
|
|
|
|
let c = a.0 / b.0;
|
2019-05-15 05:33:08 +08:00
|
|
|
if a.0.is_nan()
|
|
|
|
|| b.0.is_nan()
|
|
|
|
|| c.is_nan()
|
|
|
|
|| c.abs() <= unsafe { mem::transmute(4503599627370495u64) }
|
2018-02-01 02:04:01 +08:00
|
|
|
{
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(c)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::div::__divdf3vfp(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (LargeF32, LargeF32)| {
|
2018-02-01 02:04:01 +08:00
|
|
|
if b.0 == 0.0 {
|
2019-05-15 05:33:08 +08:00
|
|
|
return None;
|
2018-02-01 02:04:01 +08:00
|
|
|
}
|
|
|
|
let c = a.0 / b.0;
|
2019-05-15 05:33:08 +08:00
|
|
|
if a.0.is_nan()
|
|
|
|
|| b.0.is_nan()
|
|
|
|
|| c.is_nan()
|
|
|
|
|| c.abs() <= unsafe { mem::transmute(16777215u32) }
|
2018-02-01 02:04:01 +08:00
|
|
|
{
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(c)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::float::div::__divsf3vfp(a, b)",
|
|
|
|
);
|
2018-02-01 02:04:01 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
// int/addsub.rs
|
2019-05-15 05:33:08 +08:00
|
|
|
gen(
|
|
|
|
|(a, b): (MyU128, MyU128)| Some(a.0.wrapping_add(b.0)),
|
2019-07-13 18:27:58 +08:00
|
|
|
"builtins::int::addsub::__rust_u128_add(a, b)",
|
2019-05-15 05:33:08 +08:00
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyI128, MyI128)| Some(a.0.wrapping_add(b.0)),
|
2019-07-13 18:27:58 +08:00
|
|
|
"builtins::int::addsub::__rust_i128_add(a, b)",
|
2019-05-15 05:33:08 +08:00
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyU128, MyU128)| Some(a.0.overflowing_add(b.0)),
|
2019-07-13 18:27:58 +08:00
|
|
|
"builtins::int::addsub::__rust_u128_addo(a, b)",
|
2019-05-15 05:33:08 +08:00
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyI128, MyI128)| Some(a.0.overflowing_add(b.0)),
|
2019-07-13 18:27:58 +08:00
|
|
|
"builtins::int::addsub::__rust_i128_addo(a, b)",
|
2019-05-15 05:33:08 +08:00
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyU128, MyU128)| Some(a.0.wrapping_sub(b.0)),
|
2019-07-13 18:27:58 +08:00
|
|
|
"builtins::int::addsub::__rust_u128_sub(a, b)",
|
2019-05-15 05:33:08 +08:00
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyI128, MyI128)| Some(a.0.wrapping_sub(b.0)),
|
2019-07-13 18:27:58 +08:00
|
|
|
"builtins::int::addsub::__rust_i128_sub(a, b)",
|
2019-05-15 05:33:08 +08:00
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyU128, MyU128)| Some(a.0.overflowing_sub(b.0)),
|
2019-07-13 18:27:58 +08:00
|
|
|
"builtins::int::addsub::__rust_u128_subo(a, b)",
|
2019-05-15 05:33:08 +08:00
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyI128, MyI128)| Some(a.0.overflowing_sub(b.0)),
|
2019-07-13 18:27:58 +08:00
|
|
|
"builtins::int::addsub::__rust_i128_subo(a, b)",
|
2019-05-15 05:33:08 +08:00
|
|
|
);
|
2018-02-01 02:04:01 +08:00
|
|
|
|
|
|
|
// int/mul.rs
|
2019-05-15 05:33:08 +08:00
|
|
|
gen(
|
|
|
|
|(a, b): (MyU64, MyU64)| Some(a.0.wrapping_mul(b.0)),
|
|
|
|
"builtins::int::mul::__muldi3(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyI64, MyI64)| Some(a.0.overflowing_mul(b.0)),
|
2018-02-01 02:04:01 +08:00
|
|
|
"{
|
|
|
|
let mut o = 2;
|
2018-05-12 07:45:30 +08:00
|
|
|
let c = builtins::int::mul::__mulodi4(a, b, &mut o);
|
2018-02-01 02:04:01 +08:00
|
|
|
(c, match o { 0 => false, 1 => true, _ => panic!() })
|
2019-05-15 05:33:08 +08:00
|
|
|
}",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyI32, MyI32)| Some(a.0.overflowing_mul(b.0)),
|
2018-02-01 02:04:01 +08:00
|
|
|
"{
|
|
|
|
let mut o = 2;
|
2018-05-12 07:45:30 +08:00
|
|
|
let c = builtins::int::mul::__mulosi4(a, b, &mut o);
|
2018-02-01 02:04:01 +08:00
|
|
|
(c, match o { 0 => false, 1 => true, _ => panic!() })
|
2019-05-15 05:33:08 +08:00
|
|
|
}",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyI128, MyI128)| Some(a.0.wrapping_mul(b.0)),
|
|
|
|
"builtins::int::mul::__multi3(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyI128, MyI128)| Some(a.0.overflowing_mul(b.0)),
|
2019-05-03 04:44:20 +08:00
|
|
|
"{
|
|
|
|
let mut o = 2;
|
|
|
|
let c = builtins::int::mul::__muloti4(a, b, &mut o);
|
|
|
|
(c, match o { 0 => false, 1 => true, _ => panic!() })
|
2019-05-15 05:33:08 +08:00
|
|
|
}",
|
|
|
|
);
|
2018-02-01 02:04:01 +08:00
|
|
|
|
|
|
|
// int/sdiv.rs
|
2019-05-15 05:33:08 +08:00
|
|
|
gen(
|
|
|
|
|(a, b): (MyI64, MyI64)| {
|
2018-02-01 02:04:01 +08:00
|
|
|
if b.0 == 0 {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(a.0 / b.0)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::int::sdiv::__divdi3(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyI64, MyI64)| {
|
2018-02-01 02:04:01 +08:00
|
|
|
if b.0 == 0 {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some((a.0 / b.0, a.0 % b.0))
|
|
|
|
}
|
|
|
|
},
|
|
|
|
"{
|
|
|
|
let mut r = 0;
|
2018-05-12 07:45:30 +08:00
|
|
|
(builtins::int::sdiv::__divmoddi4(a, b, &mut r), r)
|
2019-05-15 05:33:08 +08:00
|
|
|
}",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyI32, MyI32)| {
|
2018-02-01 02:04:01 +08:00
|
|
|
if b.0 == 0 {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some((a.0 / b.0, a.0 % b.0))
|
|
|
|
}
|
|
|
|
},
|
|
|
|
"{
|
|
|
|
let mut r = 0;
|
2018-05-12 07:45:30 +08:00
|
|
|
(builtins::int::sdiv::__divmodsi4(a, b, &mut r), r)
|
2019-05-15 05:33:08 +08:00
|
|
|
}",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyI32, MyI32)| {
|
2018-02-01 02:04:01 +08:00
|
|
|
if b.0 == 0 {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(a.0 / b.0)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::int::sdiv::__divsi3(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyI32, MyI32)| {
|
2018-02-01 02:04:01 +08:00
|
|
|
if b.0 == 0 {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(a.0 % b.0)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::int::sdiv::__modsi3(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyI64, MyI64)| {
|
2018-02-01 02:04:01 +08:00
|
|
|
if b.0 == 0 {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(a.0 % b.0)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::int::sdiv::__moddi3(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyI128, MyI128)| {
|
2019-05-03 04:44:20 +08:00
|
|
|
if b.0 == 0 {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(a.0 / b.0)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::int::sdiv::__divti3(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyI128, MyI128)| {
|
2019-05-03 04:44:20 +08:00
|
|
|
if b.0 == 0 {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(a.0 % b.0)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::int::sdiv::__modti3(a, b)",
|
|
|
|
);
|
2018-02-01 02:04:01 +08:00
|
|
|
|
|
|
|
// int/shift.rs
|
2019-05-15 05:33:08 +08:00
|
|
|
gen(
|
|
|
|
|(a, b): (MyU64, MyU32)| Some(a.0 << (b.0 % 64)),
|
|
|
|
"builtins::int::shift::__ashldi3(a, b % 64)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyU128, MyU32)| Some(a.0 << (b.0 % 128)),
|
|
|
|
"builtins::int::shift::__ashlti3(a, b % 128)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyI64, MyU32)| Some(a.0 >> (b.0 % 64)),
|
|
|
|
"builtins::int::shift::__ashrdi3(a, b % 64)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyI128, MyU32)| Some(a.0 >> (b.0 % 128)),
|
|
|
|
"builtins::int::shift::__ashrti3(a, b % 128)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyU64, MyU32)| Some(a.0 >> (b.0 % 64)),
|
|
|
|
"builtins::int::shift::__lshrdi3(a, b % 64)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyU128, MyU32)| Some(a.0 >> (b.0 % 128)),
|
|
|
|
"builtins::int::shift::__lshrti3(a, b % 128)",
|
|
|
|
);
|
2018-02-01 02:04:01 +08:00
|
|
|
|
|
|
|
// int/udiv.rs
|
2019-05-15 05:33:08 +08:00
|
|
|
gen(
|
|
|
|
|(a, b): (MyU64, MyU64)| {
|
2018-02-01 02:04:01 +08:00
|
|
|
if b.0 == 0 {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(a.0 / b.0)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::int::udiv::__udivdi3(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyU64, MyU64)| {
|
2018-02-01 02:04:01 +08:00
|
|
|
if b.0 == 0 {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some((a.0 / b.0, a.0 % b.0))
|
|
|
|
}
|
|
|
|
},
|
|
|
|
"{
|
|
|
|
let mut r = 0;
|
2018-05-12 07:45:30 +08:00
|
|
|
(builtins::int::udiv::__udivmoddi4(a, b, Some(&mut r)), r)
|
2019-05-15 05:33:08 +08:00
|
|
|
}",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyU32, MyU32)| {
|
2018-02-01 02:04:01 +08:00
|
|
|
if b.0 == 0 {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some((a.0 / b.0, a.0 % b.0))
|
|
|
|
}
|
|
|
|
},
|
|
|
|
"{
|
|
|
|
let mut r = 0;
|
2018-05-12 07:45:30 +08:00
|
|
|
(builtins::int::udiv::__udivmodsi4(a, b, Some(&mut r)), r)
|
2019-05-15 05:33:08 +08:00
|
|
|
}",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyU32, MyU32)| {
|
2018-02-01 02:04:01 +08:00
|
|
|
if b.0 == 0 {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(a.0 / b.0)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::int::udiv::__udivsi3(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyU32, MyU32)| {
|
2018-02-01 02:04:01 +08:00
|
|
|
if b.0 == 0 {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(a.0 % b.0)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::int::udiv::__umodsi3(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyU64, MyU64)| {
|
2018-02-01 02:04:01 +08:00
|
|
|
if b.0 == 0 {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(a.0 % b.0)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::int::udiv::__umoddi3(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyU128, MyU128)| {
|
2019-05-03 04:44:20 +08:00
|
|
|
if b.0 == 0 {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(a.0 / b.0)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::int::udiv::__udivti3(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyU128, MyU128)| {
|
2019-05-03 04:44:20 +08:00
|
|
|
if b.0 == 0 {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(a.0 % b.0)
|
|
|
|
}
|
|
|
|
},
|
2019-05-15 05:33:08 +08:00
|
|
|
"builtins::int::udiv::__umodti3(a, b)",
|
|
|
|
);
|
|
|
|
gen(
|
|
|
|
|(a, b): (MyU128, MyU128)| {
|
2019-05-03 04:44:20 +08:00
|
|
|
if b.0 == 0 {
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some((a.0 / b.0, a.0 % b.0))
|
|
|
|
}
|
|
|
|
},
|
|
|
|
"{
|
|
|
|
let mut r = 0;
|
|
|
|
(builtins::int::udiv::__udivmodti4(a, b, Some(&mut r)), r)
|
2019-05-15 05:33:08 +08:00
|
|
|
}",
|
|
|
|
);
|
2018-02-01 02:04:01 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
macro_rules! gen_float {
|
|
|
|
($name:ident,
|
|
|
|
$fty:ident,
|
|
|
|
$uty:ident,
|
|
|
|
$bits:expr,
|
|
|
|
$significand_bits:expr) => {
|
|
|
|
pub fn $name<R>(rng: &mut R) -> $fty
|
|
|
|
where
|
2019-08-20 05:02:08 +08:00
|
|
|
R: Rng + ?Sized,
|
2018-02-01 02:04:01 +08:00
|
|
|
{
|
|
|
|
const BITS: u8 = $bits;
|
|
|
|
const SIGNIFICAND_BITS: u8 = $significand_bits;
|
|
|
|
|
|
|
|
const SIGNIFICAND_MASK: $uty = (1 << SIGNIFICAND_BITS) - 1;
|
|
|
|
const SIGN_MASK: $uty = (1 << (BITS - 1));
|
|
|
|
const EXPONENT_MASK: $uty = !(SIGN_MASK | SIGNIFICAND_MASK);
|
|
|
|
|
|
|
|
fn mk_f32(sign: bool, exponent: $uty, significand: $uty) -> $fty {
|
|
|
|
unsafe {
|
2019-05-15 05:33:08 +08:00
|
|
|
mem::transmute(
|
|
|
|
((sign as $uty) << (BITS - 1))
|
|
|
|
| ((exponent & EXPONENT_MASK) << SIGNIFICAND_BITS)
|
|
|
|
| (significand & SIGNIFICAND_MASK),
|
|
|
|
)
|
2018-02-01 02:04:01 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-08-20 05:02:08 +08:00
|
|
|
if rng.gen_range(0, 10) == 1 {
|
2018-02-01 02:04:01 +08:00
|
|
|
// Special values
|
2019-08-20 05:02:08 +08:00
|
|
|
*[
|
2019-05-15 05:33:08 +08:00
|
|
|
-0.0,
|
|
|
|
0.0,
|
|
|
|
::std::$fty::MIN,
|
|
|
|
::std::$fty::MIN_POSITIVE,
|
|
|
|
::std::$fty::MAX,
|
|
|
|
::std::$fty::NAN,
|
|
|
|
::std::$fty::INFINITY,
|
|
|
|
-::std::$fty::INFINITY,
|
2019-08-20 05:02:08 +08:00
|
|
|
]
|
|
|
|
.choose(rng)
|
2019-05-15 05:33:08 +08:00
|
|
|
.unwrap()
|
2019-08-20 05:02:08 +08:00
|
|
|
} else if rng.gen_range(0, 10) == 1 {
|
2018-02-01 02:04:01 +08:00
|
|
|
// NaN patterns
|
|
|
|
mk_f32(rng.gen(), rng.gen(), 0)
|
|
|
|
} else if rng.gen() {
|
|
|
|
// Denormalized
|
|
|
|
mk_f32(rng.gen(), 0, rng.gen())
|
|
|
|
} else {
|
|
|
|
// Random anything
|
|
|
|
mk_f32(rng.gen(), rng.gen(), rng.gen())
|
|
|
|
}
|
|
|
|
}
|
2019-05-15 05:33:08 +08:00
|
|
|
};
|
2018-02-01 02:04:01 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
gen_float!(gen_f32, f32, u32, 32, 23);
|
|
|
|
gen_float!(gen_f64, f64, u64, 64, 52);
|
|
|
|
|
|
|
|
macro_rules! gen_large_float {
|
|
|
|
($name:ident,
|
|
|
|
$fty:ident,
|
|
|
|
$uty:ident,
|
|
|
|
$bits:expr,
|
|
|
|
$significand_bits:expr) => {
|
|
|
|
pub fn $name<R>(rng: &mut R) -> $fty
|
|
|
|
where
|
2019-08-20 05:02:08 +08:00
|
|
|
R: Rng + ?Sized,
|
2018-02-01 02:04:01 +08:00
|
|
|
{
|
|
|
|
const BITS: u8 = $bits;
|
|
|
|
const SIGNIFICAND_BITS: u8 = $significand_bits;
|
|
|
|
|
|
|
|
const SIGNIFICAND_MASK: $uty = (1 << SIGNIFICAND_BITS) - 1;
|
|
|
|
const SIGN_MASK: $uty = (1 << (BITS - 1));
|
|
|
|
const EXPONENT_MASK: $uty = !(SIGN_MASK | SIGNIFICAND_MASK);
|
|
|
|
|
|
|
|
fn mk_f32(sign: bool, exponent: $uty, significand: $uty) -> $fty {
|
|
|
|
unsafe {
|
2019-05-15 05:33:08 +08:00
|
|
|
mem::transmute(
|
|
|
|
((sign as $uty) << (BITS - 1))
|
|
|
|
| ((exponent & EXPONENT_MASK) << SIGNIFICAND_BITS)
|
|
|
|
| (significand & SIGNIFICAND_MASK),
|
|
|
|
)
|
2018-02-01 02:04:01 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-08-20 05:02:08 +08:00
|
|
|
if rng.gen_range(0, 10) == 1 {
|
2018-02-01 02:04:01 +08:00
|
|
|
// Special values
|
2019-08-20 05:02:08 +08:00
|
|
|
*[
|
2019-05-15 05:33:08 +08:00
|
|
|
-0.0,
|
|
|
|
0.0,
|
|
|
|
::std::$fty::MIN,
|
|
|
|
::std::$fty::MIN_POSITIVE,
|
|
|
|
::std::$fty::MAX,
|
|
|
|
::std::$fty::NAN,
|
|
|
|
::std::$fty::INFINITY,
|
|
|
|
-::std::$fty::INFINITY,
|
2019-08-20 05:02:08 +08:00
|
|
|
]
|
|
|
|
.choose(rng)
|
2019-05-15 05:33:08 +08:00
|
|
|
.unwrap()
|
2019-08-20 05:02:08 +08:00
|
|
|
} else if rng.gen_range(0, 10) == 1 {
|
2018-02-01 02:04:01 +08:00
|
|
|
// NaN patterns
|
|
|
|
mk_f32(rng.gen(), rng.gen(), 0)
|
|
|
|
} else if rng.gen() {
|
|
|
|
// Denormalized
|
|
|
|
mk_f32(rng.gen(), 0, rng.gen())
|
|
|
|
} else {
|
|
|
|
// Random anything
|
|
|
|
rng.gen::<$fty>()
|
|
|
|
}
|
|
|
|
}
|
2019-05-15 05:33:08 +08:00
|
|
|
};
|
2018-02-01 02:04:01 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
gen_large_float!(gen_large_f32, f32, u32, 32, 23);
|
|
|
|
gen_large_float!(gen_large_f64, f64, u64, 64, 52);
|
|
|
|
|
2019-08-20 05:02:08 +08:00
|
|
|
trait TestInput: Hash + Eq + fmt::Debug {
|
2018-02-01 02:04:01 +08:00
|
|
|
fn ty_name() -> String;
|
|
|
|
fn generate_lets(container: &str, cnt: &mut u8) -> String;
|
|
|
|
fn generate_static(&self, dst: &mut String);
|
|
|
|
}
|
|
|
|
|
|
|
|
trait TestOutput {
|
|
|
|
fn ty_name() -> String;
|
|
|
|
fn generate_static(&self, dst: &mut String);
|
|
|
|
fn generate_expr(container: &str) -> String;
|
|
|
|
}
|
|
|
|
|
|
|
|
fn gen<F, A, R>(mut generate: F, test: &str)
|
2019-05-15 05:33:08 +08:00
|
|
|
where
|
|
|
|
F: FnMut(A) -> Option<R>,
|
|
|
|
A: TestInput + Copy,
|
|
|
|
R: TestOutput,
|
2019-08-20 05:02:08 +08:00
|
|
|
rand::distributions::Standard: rand::distributions::Distribution<A>,
|
2018-02-01 02:04:01 +08:00
|
|
|
{
|
|
|
|
let rng = &mut rand::thread_rng();
|
2019-05-15 05:33:08 +08:00
|
|
|
let testname = test.split("::").last().unwrap().split("(").next().unwrap();
|
2018-02-01 02:04:01 +08:00
|
|
|
let out_dir = PathBuf::from(env::var_os("OUT_DIR").unwrap());
|
|
|
|
let out_file = out_dir.join("generated.rs");
|
|
|
|
|
|
|
|
let mut testcases = HashMap::new();
|
|
|
|
let mut n = NTESTS;
|
|
|
|
while n > 0 {
|
|
|
|
let input: A = rng.gen();
|
|
|
|
if testcases.contains_key(&input) {
|
2019-05-15 05:33:08 +08:00
|
|
|
continue;
|
2018-02-01 02:04:01 +08:00
|
|
|
}
|
|
|
|
let output = match generate(input) {
|
|
|
|
Some(o) => o,
|
|
|
|
None => continue,
|
|
|
|
};
|
|
|
|
testcases.insert(input, output);
|
|
|
|
n -= 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
let mut contents = String::new();
|
|
|
|
contents.push_str(&format!("mod {} {{\nuse super::*;\n", testname));
|
|
|
|
contents.push_str("#[test]\n");
|
|
|
|
contents.push_str("fn test() {\n");
|
2019-05-15 05:33:08 +08:00
|
|
|
contents.push_str(&format!(
|
|
|
|
"static TESTS: [({}, {}); {}] = [\n",
|
|
|
|
A::ty_name(),
|
|
|
|
R::ty_name(),
|
|
|
|
NTESTS
|
|
|
|
));
|
2018-02-01 02:04:01 +08:00
|
|
|
for (input, output) in testcases {
|
|
|
|
contents.push_str(" (");
|
|
|
|
input.generate_static(&mut contents);
|
|
|
|
contents.push_str(", ");
|
|
|
|
output.generate_static(&mut contents);
|
|
|
|
contents.push_str("),\n");
|
|
|
|
}
|
|
|
|
contents.push_str("];\n");
|
|
|
|
|
2019-05-15 05:33:08 +08:00
|
|
|
contents.push_str(&format!(
|
|
|
|
r#"
|
2018-02-01 02:04:01 +08:00
|
|
|
for &(inputs, output) in TESTS.iter() {{
|
|
|
|
{}
|
|
|
|
assert_eq!({}, {}, "inputs {{:?}}", inputs)
|
|
|
|
}}
|
|
|
|
"#,
|
|
|
|
A::generate_lets("inputs", &mut 0),
|
|
|
|
R::generate_expr("output"),
|
|
|
|
test,
|
|
|
|
));
|
|
|
|
contents.push_str("\n}\n");
|
|
|
|
contents.push_str("\n}\n");
|
|
|
|
|
|
|
|
OpenOptions::new()
|
|
|
|
.write(true)
|
|
|
|
.append(true)
|
|
|
|
.create(true)
|
|
|
|
.open(out_file)
|
|
|
|
.unwrap()
|
|
|
|
.write_all(contents.as_bytes())
|
|
|
|
.unwrap();
|
|
|
|
}
|
|
|
|
|
|
|
|
macro_rules! my_float {
|
|
|
|
($(struct $name:ident($inner:ident) = $gen:ident;)*) => ($(
|
|
|
|
#[derive(Debug, Clone, Copy)]
|
|
|
|
struct $name($inner);
|
|
|
|
|
|
|
|
impl TestInput for $name {
|
|
|
|
fn ty_name() -> String {
|
|
|
|
format!("u{}", &stringify!($inner)[1..])
|
|
|
|
}
|
|
|
|
|
|
|
|
fn generate_lets(container: &str, cnt: &mut u8) -> String {
|
|
|
|
let me = *cnt;
|
|
|
|
*cnt += 1;
|
|
|
|
format!("let {} = {}::from_bits({});\n",
|
|
|
|
(b'a' + me) as char,
|
|
|
|
stringify!($inner),
|
|
|
|
container)
|
|
|
|
}
|
|
|
|
|
|
|
|
fn generate_static(&self, dst: &mut String) {
|
|
|
|
write!(dst, "{}", self.0.to_bits()).unwrap();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-08-20 05:02:08 +08:00
|
|
|
impl rand::distributions::Distribution<$name> for rand::distributions::Standard {
|
|
|
|
fn sample<R: rand::Rng + ?Sized >(&self, r: &mut R) -> $name {
|
2018-02-01 02:04:01 +08:00
|
|
|
$name($gen(r))
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
impl Hash for $name {
|
|
|
|
fn hash<H: Hasher>(&self, h: &mut H) {
|
|
|
|
self.0.to_bits().hash(h)
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
impl PartialEq for $name {
|
|
|
|
fn eq(&self, other: &$name) -> bool {
|
|
|
|
self.0.to_bits() == other.0.to_bits()
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
impl Eq for $name {}
|
|
|
|
|
|
|
|
)*)
|
|
|
|
}
|
|
|
|
|
|
|
|
my_float! {
|
|
|
|
struct MyF64(f64) = gen_f64;
|
|
|
|
struct LargeF64(f64) = gen_large_f64;
|
|
|
|
struct MyF32(f32) = gen_f32;
|
|
|
|
struct LargeF32(f32) = gen_large_f32;
|
|
|
|
}
|
|
|
|
|
|
|
|
macro_rules! my_integer {
|
|
|
|
($(struct $name:ident($inner:ident);)*) => ($(
|
|
|
|
#[derive(Debug, Clone, Copy, Hash, PartialEq, Eq)]
|
|
|
|
struct $name($inner);
|
|
|
|
|
|
|
|
impl TestInput for $name {
|
|
|
|
fn ty_name() -> String {
|
|
|
|
stringify!($inner).to_string()
|
|
|
|
}
|
|
|
|
|
|
|
|
fn generate_lets(container: &str, cnt: &mut u8) -> String {
|
|
|
|
let me = *cnt;
|
|
|
|
*cnt += 1;
|
|
|
|
format!("let {} = {};\n",
|
|
|
|
(b'a' + me) as char,
|
|
|
|
container)
|
|
|
|
}
|
|
|
|
|
|
|
|
fn generate_static(&self, dst: &mut String) {
|
|
|
|
write!(dst, "{}", self.0).unwrap();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-08-20 05:02:08 +08:00
|
|
|
impl rand::distributions::Distribution<$name> for rand::distributions::Standard {
|
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|
|
fn sample<R: rand::Rng + ?Sized >(&self, r: &mut R) -> $name {
|
2018-02-01 02:04:01 +08:00
|
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|
let bits = (0 as $inner).count_zeros();
|
|
|
|
let mut mk = || {
|
2019-08-20 05:02:08 +08:00
|
|
|
if r.gen_range(0, 10) == 1 {
|
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|
|
*[
|
2018-02-01 02:04:01 +08:00
|
|
|
::std::$inner::MAX >> (bits / 2),
|
|
|
|
0,
|
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|
|
::std::$inner::MIN >> (bits / 2),
|
2019-08-20 05:02:08 +08:00
|
|
|
].choose(r).unwrap()
|
2018-02-01 02:04:01 +08:00
|
|
|
} else {
|
2019-08-20 05:02:08 +08:00
|
|
|
r.gen::<$inner>()
|
2018-02-01 02:04:01 +08:00
|
|
|
}
|
|
|
|
};
|
|
|
|
let a = mk();
|
|
|
|
let b = mk();
|
|
|
|
$name((a << (bits / 2)) | (b & (!0 << (bits / 2))))
|
|
|
|
}
|
|
|
|
}
|
|
|
|
)*)
|
|
|
|
}
|
|
|
|
|
|
|
|
my_integer! {
|
|
|
|
struct MyI32(i32);
|
|
|
|
struct MyI64(i64);
|
|
|
|
struct MyI128(i128);
|
|
|
|
struct MyU32(u32);
|
|
|
|
struct MyU64(u64);
|
|
|
|
struct MyU128(u128);
|
|
|
|
}
|
|
|
|
|
|
|
|
impl<A, B> TestInput for (A, B)
|
2019-05-15 05:33:08 +08:00
|
|
|
where
|
|
|
|
A: TestInput,
|
|
|
|
B: TestInput,
|
2018-02-01 02:04:01 +08:00
|
|
|
{
|
|
|
|
fn ty_name() -> String {
|
|
|
|
format!("({}, {})", A::ty_name(), B::ty_name())
|
|
|
|
}
|
|
|
|
|
|
|
|
fn generate_lets(container: &str, cnt: &mut u8) -> String {
|
2019-05-15 05:33:08 +08:00
|
|
|
format!(
|
|
|
|
"{}{}",
|
|
|
|
A::generate_lets(&format!("{}.0", container), cnt),
|
|
|
|
B::generate_lets(&format!("{}.1", container), cnt)
|
|
|
|
)
|
2018-02-01 02:04:01 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
fn generate_static(&self, dst: &mut String) {
|
|
|
|
dst.push_str("(");
|
|
|
|
self.0.generate_static(dst);
|
|
|
|
dst.push_str(", ");
|
|
|
|
self.1.generate_static(dst);
|
|
|
|
dst.push_str(")");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
impl TestOutput for f64 {
|
|
|
|
fn ty_name() -> String {
|
|
|
|
"u64".to_string()
|
|
|
|
}
|
|
|
|
|
|
|
|
fn generate_static(&self, dst: &mut String) {
|
|
|
|
write!(dst, "{}", self.to_bits()).unwrap();
|
|
|
|
}
|
|
|
|
|
|
|
|
fn generate_expr(container: &str) -> String {
|
|
|
|
format!("f64::from_bits({})", container)
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
impl TestOutput for f32 {
|
|
|
|
fn ty_name() -> String {
|
|
|
|
"u32".to_string()
|
|
|
|
}
|
|
|
|
|
|
|
|
fn generate_static(&self, dst: &mut String) {
|
|
|
|
write!(dst, "{}", self.to_bits()).unwrap();
|
|
|
|
}
|
|
|
|
|
|
|
|
fn generate_expr(container: &str) -> String {
|
|
|
|
format!("f32::from_bits({})", container)
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
macro_rules! plain_test_output {
|
|
|
|
($($i:tt)*) => ($(
|
|
|
|
impl TestOutput for $i {
|
|
|
|
fn ty_name() -> String {
|
|
|
|
stringify!($i).to_string()
|
|
|
|
}
|
|
|
|
|
|
|
|
fn generate_static(&self, dst: &mut String) {
|
|
|
|
write!(dst, "{}", self).unwrap();
|
|
|
|
}
|
|
|
|
|
|
|
|
fn generate_expr(container: &str) -> String {
|
|
|
|
container.to_string()
|
|
|
|
}
|
|
|
|
}
|
|
|
|
)*)
|
|
|
|
}
|
|
|
|
|
|
|
|
plain_test_output!(i32 i64 i128 u32 u64 u128 bool);
|
|
|
|
|
|
|
|
impl<A, B> TestOutput for (A, B)
|
2019-05-15 05:33:08 +08:00
|
|
|
where
|
|
|
|
A: TestOutput,
|
|
|
|
B: TestOutput,
|
2018-02-01 02:04:01 +08:00
|
|
|
{
|
|
|
|
fn ty_name() -> String {
|
|
|
|
format!("({}, {})", A::ty_name(), B::ty_name())
|
|
|
|
}
|
|
|
|
|
|
|
|
fn generate_static(&self, dst: &mut String) {
|
|
|
|
dst.push_str("(");
|
|
|
|
self.0.generate_static(dst);
|
|
|
|
dst.push_str(", ");
|
|
|
|
self.1.generate_static(dst);
|
|
|
|
dst.push_str(")");
|
|
|
|
}
|
|
|
|
|
|
|
|
fn generate_expr(container: &str) -> String {
|
|
|
|
container.to_string()
|
|
|
|
}
|
|
|
|
}
|
2019-08-20 05:02:08 +08:00
|
|
|
|
|
|
|
trait FromFloat<T>: Sized {
|
|
|
|
fn cast(src: T) -> Option<Self>;
|
|
|
|
}
|
|
|
|
|
|
|
|
macro_rules! from_float {
|
|
|
|
($($src:ident => $($dst:ident),+);+;) => {
|
|
|
|
$(
|
|
|
|
$(
|
|
|
|
impl FromFloat<$src> for $dst {
|
|
|
|
fn cast(src: $src) -> Option<$dst> {
|
|
|
|
use std::{$dst, $src};
|
|
|
|
|
|
|
|
if src.is_nan() ||
|
|
|
|
src.is_infinite() ||
|
|
|
|
src < std::$dst::MIN as $src ||
|
|
|
|
src > std::$dst::MAX as $src
|
|
|
|
{
|
|
|
|
None
|
|
|
|
} else {
|
|
|
|
Some(src as $dst)
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
)+
|
|
|
|
)+
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
from_float! {
|
|
|
|
f32 => i32, i64, i128, u32, u64, u128;
|
|
|
|
f64 => i32, i64, i128, u32, u64, u128;
|
|
|
|
}
|