artiq/artiq/gateware/suservo
David Nadlinger 720838a23e gateware/suservo: Avoid magic number for activation delay width
Mostly for documentation purposes; 8 bits ought to be enough for
everyone.
2019-06-14 23:45:40 +01:00
..
__init__.py suservo: add pads rewiring layer for eems 2018-04-23 18:30:18 +00:00
adc_ser.py suservo: remove adc return clock gating 2018-05-14 12:26:49 +00:00
dds_ser.py suservo: lots of gateware/ runtime changes 2018-04-27 13:50:26 +02:00
iir.py gateware/suservo: Avoid magic number for activation delay width 2019-06-14 23:45:40 +01:00
pads.py suservo: clkout and sdo[b-d] are inverted 2018-05-14 12:26:49 +00:00
servo.py suservo: fix restart counter assertion 2018-05-31 15:56:11 +00:00
spi.py suservo: lots of gateware/ runtime changes 2018-04-27 13:50:26 +02:00