mirror of
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221 lines
7.5 KiB
ReStructuredText
221 lines
7.5 KiB
ReStructuredText
.. _install-from-source:
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Installing ARTIQ from source
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============================
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.. note::
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This method is only recommended for developers and advanced users. An easier way to install ARTIQ is via the Anaconda packages (see :ref:`Installing ARTIQ <install-from-conda>`).
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Preparing the build environment for the core device
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---------------------------------------------------
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These steps are required to generate code that can run on the core
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device. They are necessary both for building the MiSoC BIOS
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and the ARTIQ kernels.
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* Create a development directory: ::
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$ mkdir ~/artiq-dev
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* Clone ARTIQ repository: ::
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$ cd ~/artiq-dev
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$ git clone --recursive https://github.com/m-labs/artiq
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* Install OpenRISC binutils (or1k-linux-...): ::
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$ cd ~/artiq-dev
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$ wget https://ftp.gnu.org/gnu/binutils/binutils-2.26.tar.bz2
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$ tar xvf binutils-2.26.tar.bz2
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$ cd binutils-2.26
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$ mkdir build
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$ cd build
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$ ../configure --target=or1k-linux --prefix=/usr/local
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$ make -j4
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$ sudo make install
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.. note::
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We're using an ``or1k-linux`` target because it is necessary to enable
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shared library support in ``ld``, not because Linux is involved.
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* Install LLVM and Clang: ::
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$ cd ~/artiq-dev
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$ git clone -b artiq-3.8 https://github.com/m-labs/llvm-or1k
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$ cd llvm-or1k
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$ git clone -b artiq-3.8 https://github.com/m-labs/clang-or1k tools/clang
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$ mkdir build
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$ cd build
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$ cmake .. -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=/usr/local/llvm-or1k -DLLVM_TARGETS_TO_BUILD="OR1K;X86" -DLLVM_ENABLE_ASSERTIONS=ON
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$ make -j4
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$ sudo make install
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.. note::
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Compilation of LLVM can take more than 30 min on some machines.
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Preparing the core device FPGA board
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------------------------------------
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These steps are required to generate gateware bitstream (``.bit``) files, build the MiSoC BIOS and ARTIQ runtime, and flash FPGA boards. If the board is already flashed, you may skip those steps and go directly to `Installing the host-side software`.
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* Install the FPGA vendor tools (i.e. Xilinx ISE and/or Vivado):
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* Get Xilinx tools from http://www.xilinx.com/support/download/index.htm. ISE can build gateware bitstreams both for boards using the Spartan-6 (Pipistrello) and 7-series devices (KC705), while Vivado supports only boards using 7-series devices.
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* The Pipistrello is supported by Webpack, the KC705 is not.
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* During the Xilinx toolchain installation, uncheck ``Install cable drivers`` (they are not required as we use better and open source alternatives).
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* Install Migen: ::
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$ cd ~/artiq-dev
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$ git clone https://github.com/m-labs/migen
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$ cd migen
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$ python3.5 setup.py develop --user
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.. note::
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The options ``develop`` and ``--user`` are for setup.py to install Migen in ``~/.local/lib/python3.5``.
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* Install the required flash proxy gateware bitstreams:
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The purpose of the flash proxy gateware bitstream is to give programming software fast JTAG access to the flash connected to the FPGA.
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* Pipistrello and KC705:
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::
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$ cd ~/artiq-dev
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$ wget https://raw.githubusercontent.com/jordens/bscan_spi_bitstreams/master/bscan_spi_xc7k325t.bit
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$ wget https://raw.githubusercontent.com/jordens/bscan_spi_bitstreams/master/bscan_spi_xc6slx45.bit
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Then move both files ``~/artiq-dev/bscan_spi_xc6slx45.bit`` and ``~/artiq-dev/bscan_spi_xc7k325t.bit`` to ``~/.migen``, ``/usr/local/share/migen``, or ``/usr/share/migen``.
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* :ref:`Download and install OpenOCD <install-openocd>`.
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* Download and install ``asyncserial``: ::
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$ cd ~/artiq-dev
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$ git clone https://www.github.com/m-labs/asyncserial
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$ cd asyncserial
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$ python3.5 setup.py develop --user
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* Download and install MiSoC: ::
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$ cd ~/artiq-dev
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$ git clone --recursive https://github.com/m-labs/misoc
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$ cd misoc
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$ python3.5 setup.py develop --user
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* Download and install ``pythonparser``: ::
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$ cd ~/artiq-dev
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$ git clone https://www.github.com/m-labs/pythonparser
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$ cd pythonparser
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$ python3.5 setup.py develop --user
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* Download and install ARTIQ: ::
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$ cd ~/artiq-dev
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$ git clone --recursive https://github.com/m-labs/artiq
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$ cd artiq
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$ python3.5 setup.py develop --user
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.. note::
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If you have any trouble during ARTIQ setup about ``pygit2`` installation,
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refer to the section dealing with
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:ref:`installing the host-side software <installing-the-host-side-software>`.
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* Build the gateware bitstream, BIOS and runtime by running:
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::
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$ cd ~/artiq-dev
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$ export PATH=/usr/local/llvm-or1k/bin:$PATH
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.. note:: Make sure that ``/usr/local/llvm-or1k/bin`` is first in your ``PATH``, so that the ``clang`` command you just built is found instead of the system one, if any.
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* For Pipistrello::
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$ python3.5 -m artiq.gateware.targets.pipistrello
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* For KC705::
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$ python3.5 -m artiq.gateware.targets.kc705 -H nist_qc1 # or nist_qc2
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.. note:: Add ``--toolchain vivado`` if you wish to use Vivado instead of ISE.
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* Then, gather the binaries and flash them: ::
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$ mkdir binaries
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$ cp misoc_nist_qcX_<board>/gateware/top.bit binaries
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$ cp misoc_nist_qcX_<board>/software/bios/bios.bin binaries
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$ cp misoc_nist_qcX_<board>/software/runtime/runtime.fbi binaries
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$ cd binaries
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$ artiq_flash -d . -t <board>
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.. note:: The `-t` option specifies the board your are targeting. Available options are ``kc705`` and ``pipistrello``.
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* Check that the board boots by running a serial terminal program (you may need to press its FPGA reconfiguration button or power-cycle it to load the gateware bitstream that was newly written into the flash): ::
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$ flterm /dev/ttyUSB1
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MiSoC BIOS http://m-labs.hk
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[...]
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Booting from flash...
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Loading xxxxx bytes from flash...
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Executing booted program.
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ARTIQ runtime built <date/time>
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.. note:: flterm is part of MiSoC. If you installed MiSoC with ``setup.py develop --user``, the flterm launcher is in ``~/.local/bin``.
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The communication parameters are 115200 8-N-1. Ensure that your user has access
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to the serial device (``sudo adduser $USER dialout`` assuming standard setup).
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.. _installing-the-host-side-software:
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Installing the host-side software
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---------------------------------
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* Install the llvmlite Python bindings: ::
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$ cd ~/artiq-dev
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$ git clone https://github.com/m-labs/llvmlite
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$ cd llvmlite
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$ git checkout artiq-3.8
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$ LLVM_CONFIG=/usr/local/llvm-or1k/bin/llvm-config python3.5 setup.py install --user
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* Install ARTIQ: ::
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$ cd ~/artiq-dev
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$ git clone --recursive https://github.com/m-labs/artiq # if not already done
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$ cd artiq
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$ python3.5 setup.py develop --user
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.. note::
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If you have any trouble during ARTIQ setup about ``pygit2`` installation,
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you can install it by using ``pip``:
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On Ubuntu 14.04::
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$ python3.5 `which pip3` install --user pygit2==0.19.1
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On Ubuntu 14.10::
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$ python3.5 `which pip3` install --user pygit2==0.20.3
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On Ubuntu 15.04 and 15.10::
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$ python3.5 `which pip3` install --user pygit2==0.22.1
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The rationale behind this is that pygit2 and libgit2 must have the same
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major.minor version numbers.
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See http://www.pygit2.org/install.html#version-numbers
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* Build the documentation: ::
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$ cd ~/artiq-dev/artiq/doc/manual
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$ make html
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