mirror of https://github.com/m-labs/artiq.git
27 lines
912 B
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27 lines
912 B
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FPGA board ports
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KC705
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The main target board for the ARTIQ core device is the KC705 development board from Xilinx.
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Papilio Pro
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The low-cost Papilio Pro FPGA board can be used with some limitations.
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When plugged to a QC-DAQ LVDS adapter, the AD9858 DDS hardware can be used in addition to a limited number of TTL channels. The TTL lines are mapped to RTIO channels as follows:
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+--------------+----------+----------------+
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| RTIO channel | TTL line | Capability |
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+==============+==========+================+
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| 0 | PMT0 | Output + input |
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+--------------+----------+----------------+
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| 1 | TTL0 | Output only |
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+--------------+----------+----------------+
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| 2 | TTL1 | Output only |
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+--------------+----------+----------------+
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| 3 | TTL2 | Output only |
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+--------------+----------+----------------+
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