mirror of
https://github.com/m-labs/artiq.git
synced 2024-12-19 08:26:30 +08:00
268 lines
9.1 KiB
Python
Executable File
268 lines
9.1 KiB
Python
Executable File
#!/usr/bin/env python3
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import argparse
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import os
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import subprocess
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import tempfile
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import shutil
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from functools import partial
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from artiq import __artiq_dir__ as artiq_dir
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from artiq.frontend.bit2bin import bit2bin
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def get_argparser():
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parser = argparse.ArgumentParser(
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formatter_class=argparse.RawDescriptionHelpFormatter,
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description="ARTIQ flashing/deployment tool",
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epilog="""\
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Valid actions:
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* proxy: load the flash proxy gateware bitstream
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* gateware: write gateware bitstream to flash
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* bios: write bios to flash
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* runtime: write runtime to flash
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* storage: write storage image to flash
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* load: load gateware bitstream into device (volatile but fast)
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* start: trigger the target to (re)load its gateware bitstream from flash
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Prerequisites:
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* Connect the board through its/a JTAG adapter.
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* Have OpenOCD installed and in your $PATH.
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* Have access to the JTAG adapter's devices. Udev rules from OpenOCD:
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'sudo cp openocd/contrib/99-openocd.rules /etc/udev/rules.d'
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and replug the device. Ensure you are member of the
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plugdev group: 'sudo adduser $USER plugdev' and re-login.
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""")
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parser.add_argument("-t", "--target", default="kc705",
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help="target board, default: %(default)s")
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parser.add_argument("-m", "--adapter", default=None,
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help="target adapter, default: board-dependent")
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parser.add_argument("--preinit-command", default=[], action="append",
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help="add a pre-initialization OpenOCD command. "
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"Useful for selecting a development board "
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"when several are connected.")
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parser.add_argument("-f", "--storage", help="write file to storage area")
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parser.add_argument("-d", "--dir", help="look for files in this directory")
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parser.add_argument("action", metavar="ACTION", nargs="*",
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default="proxy gateware bios runtime start".split(),
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help="actions to perform, default: %(default)s")
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return parser
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def scripts_path():
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p = ["share", "openocd", "scripts"]
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if os.name == "nt":
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p.insert(0, "Library")
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p = os.path.abspath(os.path.join(
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os.path.dirname(shutil.which("openocd")),
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"..", *p))
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return p
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def proxy_path():
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p = ["share", "bscan-spi-bitstreams"]
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p = os.path.abspath(os.path.join(
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os.path.dirname(shutil.which("openocd")),
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"..", *p))
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return p
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class Programmer:
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def __init__(self, target_file, preinit_commands):
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self.target_file = target_file
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self.preinit_commands = preinit_commands
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self.prog = []
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def init(self):
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self.prog.extend(self.preinit_commands)
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self.prog.append("init")
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def load(self, bitfile):
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raise NotImplementedError
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def proxy(self, proxy_bitfile):
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raise NotImplementedError
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def flash_binary(self, flashno, address, filename):
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raise NotImplementedError
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def start(self):
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raise NotImplementedError
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def do(self):
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self.prog.append("exit")
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cmdline = [
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"openocd",
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"-s", scripts_path()
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]
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if self.target_file is not None:
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cmdline += ["-f", self.target_file]
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cmdline += ["-c", "; ".join(self.prog)]
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subprocess.check_call(cmdline)
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class ProgrammerJtagSpi7(Programmer):
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def __init__(self, target, preinit_commands):
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Programmer.__init__(self, os.path.join("board", target + ".cfg"),
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preinit_commands)
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self.init()
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def load(self, bitfile, pld=0):
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self.prog.append("pld load {} {{{}}}".format(pld, bitfile))
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def proxy(self, proxy_bitfile, pld=0):
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self.prog.append("jtagspi_init {} {{{}}}".format(pld, proxy_bitfile))
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def flash_binary(self, flashno, address, filename):
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# jtagspi_program supports only one flash
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assert flashno == 0
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self.prog.append("jtagspi_program {{{}}} 0x{:x}".format(
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filename, address))
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def start(self):
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self.prog.append("xc7_program xc7.tap")
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class ProgrammerSayma(Programmer):
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def __init__(self, preinit_commands):
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# TODO: support Sayma RTM
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Programmer.__init__(self, None, preinit_commands)
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self.proxy_loaded = False
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self.prog += [
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"interface ftdi",
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"ftdi_device_desc \"Quad RS232-HS\"",
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"ftdi_vid_pid 0x0403 0x6011",
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"ftdi_channel 0",
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# EN_USB_JTAG on ADBUS7: out, high
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# nTRST on ADBUS4: out, high, but R46 is DNP
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"ftdi_layout_init 0x0098 0x008b",
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"reset_config none",
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"adapter_khz 5000",
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"transport select jtag",
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"source [find cpld/xilinx-xc7.cfg]", # tap 0, pld 0
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"set CHIP XCKU040",
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"source [find cpld/xilinx-xcu.cfg]", # tap 1, pld 1
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"set XILINX_USER1 0x02",
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"set XILINX_USER2 0x03",
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"set JTAGSPI_IR $XILINX_USER1",
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"source [find cpld/jtagspi.cfg]",
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"flash bank xcu.spi0 jtagspi 0 0 0 0 xcu.proxy $XILINX_USER1",
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"flash bank xcu.spi1 jtagspi 0 0 0 0 xcu.proxy $XILINX_USER2"
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]
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self.init()
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def load(self, bitfile, pld=1):
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self.prog.append("pld load {} {{{}}}".format(pld, bitfile))
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def proxy(self, proxy_bitfile, pld=1):
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self.load(proxy_bitfile, pld)
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self.prog.append("reset halt")
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def flash_binary(self, flashno, address, filename):
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self.prog += [
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"flash probe xcu.spi{}".format(flashno),
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"irscan xcu.tap $XILINX_USER{}".format(flashno+1),
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"flash write_bank {} {} 0x{:x}".format(flashno, filename, address)
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]
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def start(self):
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self.proxy_loaded = False
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self.prog.append("xcu_program xcu.tap")
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def main():
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parser = get_argparser()
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opts = parser.parse_args()
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config = {
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"kc705": {
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"programmer_factory": partial(ProgrammerJtagSpi7, "kc705"),
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"proxy_bitfile": "bscan_spi_xc7k325t.bit",
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"adapters": ["nist_clock", "nist_qc2"],
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"gateware": (0, 0x000000),
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"bios": (0, 0xaf0000),
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"runtime": (0, 0xb00000),
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"storage": (0, 0xb80000),
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},
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"sayma": {
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"programmer_factory": ProgrammerSayma,
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"proxy_bitfile": "bscan_spi_xcku040-sayma.bit",
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"adapters": [],
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"gateware": (0, 0x000000),
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"bios": (1, 0x000000),
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"runtime": (1, 0x010000),
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"storage": (1, 0x090000),
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},
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}[opts.target]
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adapter = opts.adapter
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if adapter is not None and adapter not in config["adapters"]:
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raise SystemExit("Invalid adapter for this board")
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if adapter is None and config["adapters"]:
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adapter = config["adapters"][0]
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bin_dir = opts.dir
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if bin_dir is None:
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if adapter is None:
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bin_dir = os.path.join(artiq_dir, "binaries",
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"{}".format(opts.target))
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else:
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bin_dir = os.path.join(artiq_dir, "binaries",
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"{}-{}".format(opts.target, adapter))
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if not os.path.exists(bin_dir) and opts.action != ["start"]:
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raise SystemExit("Binaries directory '{}' does not exist"
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.format(bin_dir))
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programmer = config["programmer_factory"](opts.preinit_command)
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conv = False
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for action in opts.action:
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if action == "proxy":
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proxy_found = False
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for p in [bin_dir, proxy_path(), os.path.expanduser("~/.migen"),
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"/usr/local/share/migen", "/usr/share/migen"]:
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proxy_bitfile = os.path.join(p, config["proxy_bitfile"])
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if os.access(proxy_bitfile, os.R_OK):
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programmer.proxy(proxy_bitfile)
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proxy_found = True
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break
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if not proxy_found:
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raise SystemExit(
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"proxy gateware bitstream {} not found".format(config["proxy_bitfile"]))
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elif action == "gateware":
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bin = os.path.join(bin_dir, "top.bin")
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if not os.access(bin, os.R_OK):
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bin_handle, bin = tempfile.mkstemp()
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bit = os.path.join(bin_dir, "top.bit")
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conv = True
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programmer.flash_binary(*config["gateware"], bin)
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elif action == "bios":
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programmer.flash_binary(*config["bios"], os.path.join(bin_dir, "bios.bin"))
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elif action == "runtime":
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programmer.flash_binary(*config["runtime"], os.path.join(bin_dir, "runtime.fbi"))
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elif action == "storage":
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programmer.flash_binary(*config["storage"], opts.storage)
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elif action == "load":
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programmer.load(os.path.join(bin_dir, "top.bit"))
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elif action == "start":
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programmer.start()
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else:
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raise ValueError("invalid action", action)
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if conv:
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with open(bit, "rb") as f, open(bin_handle, "wb") as g:
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bit2bin(f, g)
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try:
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programmer.do()
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finally:
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if conv:
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os.unlink(bin)
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if __name__ == "__main__":
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main()
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