mirror of https://github.com/m-labs/artiq.git
109 lines
4.4 KiB
Python
109 lines
4.4 KiB
Python
from functools import reduce
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from operator import or_
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from migen import *
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from artiq.gateware.rtio.sed import layouts
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from artiq.gateware.rtio.sed.output_network import OutputNetwork
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__all__ = ["OutputDriver"]
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class OutputDriver(Module):
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def __init__(self, channels, glbl_fine_ts_width, lane_count, seqn_width):
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self.collision = Signal()
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self.collision_channel = Signal(max=len(channels))
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self.busy = Signal()
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self.busy_channel = Signal(max=len(channels))
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# output network
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layout_on_payload = layouts.output_network_payload(channels, glbl_fine_ts_width)
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output_network = OutputNetwork(lane_count, seqn_width, layout_on_payload)
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self.submodules += output_network
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self.input = output_network.input
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# detect collisions (adds one pipeline stage)
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layout_lane_data = [
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("valid", 1),
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("collision", 1),
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("payload", layout_on_payload)
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]
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lane_datas = [Record(layout_lane_data) for _ in range(lane_count)]
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en_replaces = [channel.interface.o.enable_replace for channel in channels]
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for lane_data, on_output in zip(lane_datas, output_network.output):
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replace_occured_r = Signal()
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nondata_replace_occured_r = Signal()
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self.sync += [
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lane_data.valid.eq(on_output.valid),
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lane_data.payload.eq(on_output.payload),
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replace_occured_r.eq(on_output.replace_occured),
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nondata_replace_occured_r.eq(on_output.nondata_replace_occured)
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]
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en_replaces_rom = Memory(1, len(en_replaces), init=en_replaces)
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en_replaces_rom_port = en_replaces_rom.get_port()
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self.specials += en_replaces_rom, en_replaces_rom_port
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self.comb += [
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en_replaces_rom_port.adr.eq(on_output.payload.channel),
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lane_data.collision.eq(replace_occured_r & (~en_replaces_rom_port.dat_r | nondata_replace_occured_r))
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]
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self.sync += [
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self.collision.eq(0),
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self.collision_channel.eq(0)
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]
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for lane_data in lane_datas:
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self.sync += [
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If(lane_data.valid & lane_data.collision,
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self.collision.eq(1),
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self.collision_channel.eq(lane_data.payload.channel)
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)
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]
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# demultiplex channels (adds one pipeline stage)
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for n, channel in enumerate(channels):
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oif = channel.interface.o
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onehot_stb = []
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onehot_fine_ts = []
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onehot_address = []
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onehot_data = []
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for lane_data in lane_datas:
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selected = Signal()
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self.comb += selected.eq(lane_data.valid & ~lane_data.collision & (lane_data.payload.channel == n))
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onehot_stb.append(selected)
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if hasattr(lane_data.payload, "fine_ts") and hasattr(oif, "fine_ts"):
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ts_shift = len(lane_data.payload.fine_ts) - len(oif.fine_ts)
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onehot_fine_ts.append(Mux(selected, lane_data.payload.fine_ts[ts_shift:], 0))
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if hasattr(lane_data.payload, "address"):
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onehot_address.append(Mux(selected, lane_data.payload.address, 0))
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if hasattr(lane_data.payload, "data"):
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onehot_data.append(Mux(selected, lane_data.payload.data, 0))
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self.sync += oif.stb.eq(reduce(or_, onehot_stb))
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if hasattr(oif, "fine_ts"):
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self.sync += oif.fine_ts.eq(reduce(or_, onehot_fine_ts))
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if hasattr(oif, "address"):
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self.sync += oif.address.eq(reduce(or_, onehot_address))
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if hasattr(oif, "data"):
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self.sync += oif.data.eq(reduce(or_, onehot_data))
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# detect busy errors, at lane level to reduce muxing
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self.sync += [
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self.busy.eq(0),
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self.busy_channel.eq(0)
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]
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for lane_data in lane_datas:
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stb_r = Signal()
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channel_r = Signal(max=len(channels))
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self.sync += [
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stb_r.eq(lane_data.valid & ~lane_data.collision),
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channel_r.eq(lane_data.payload.channel),
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If(stb_r & Array(channel.interface.o.busy for channel in channels)[channel_r],
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self.busy.eq(1),
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self.busy_channel.eq(channel_r)
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)
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]
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