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194 lines
4.0 KiB
C
194 lines
4.0 KiB
C
#include <generated/csr.h>
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#include "artiq_personality.h"
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#include "rtio.h"
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#include "i2c.h"
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static void i2c_halfperiod()
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{
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timer_kernel_en_write(0);
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timer_kernel_load_write(CONFIG_CLOCK_FREQUENCY/10000);
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timer_kernel_reload_write(0);
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timer_kernel_en_write(1);
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timer_kernel_update_value_write(1);
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while(timer_kernel_value_read() != 0)
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timer_kernel_update_value_write(1);
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}
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#if (defined CONFIG_I2C_BUS_COUNT) && (CONFIG_I2C_BUS_COUNT > 0)
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#define SDA_BIT (1 << (2*busno + 1))
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#define SCL_BIT (1 << (2*busno))
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static int i2c_sda_i(int busno)
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{
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if(busno >= CONFIG_I2C_BUS_COUNT)
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return 1;
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else
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return i2c_in_read() & SDA_BIT;
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}
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static void i2c_sda_oe(int busno, int oe)
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{
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int reg;
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reg = i2c_oe_read();
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if(oe)
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reg |= SDA_BIT;
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else
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reg &= ~SDA_BIT;
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i2c_oe_write(reg);
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}
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static void i2c_sda_o(int busno, int o)
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{
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int reg;
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reg = i2c_out_read();
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if(o)
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reg |= SDA_BIT;
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else
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reg &= ~SDA_BIT;
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i2c_out_write(reg);
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}
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static void i2c_scl_oe(int busno, int oe)
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{
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int reg;
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reg = i2c_oe_read();
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if(oe)
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reg |= SCL_BIT;
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else
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reg &= ~SCL_BIT;
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i2c_oe_write(reg);
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}
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static void i2c_scl_o(int busno, int o)
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{
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int reg;
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reg = i2c_out_read();
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if(o)
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reg |= SCL_BIT;
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else
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reg &= ~SCL_BIT;
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i2c_out_write(reg);
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}
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#else
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static int i2c_sda_i(int busno)
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{
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return 1;
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}
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static void i2c_sda_oe(int busno, int oe) {}
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static void i2c_sda_o(int busno, int o) {}
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static void i2c_scl_oe(int busno, int oe) {}
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static void i2c_scl_o(int busno, int o) {}
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#endif
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void i2c_init(int busno)
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{
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/* Set SCL as output, and high level */
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i2c_scl_o(busno, 1);
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i2c_scl_oe(busno, 1);
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/* Prepare a zero level on SDA so that i2c_sda_oe pulls it down */
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i2c_sda_o(busno, 0);
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/* Release SDA */
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i2c_sda_oe(busno, 0);
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/* Check the I2C bus is ready */
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i2c_halfperiod();
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i2c_halfperiod();
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if(!i2c_sda_i(busno))
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artiq_raise_from_c("I2CError", "SDA is stuck low", 0, 0, 0);
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}
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void i2c_start(int busno)
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{
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/* Set SCL high then SDA low */
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i2c_scl_o(busno, 1);
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i2c_halfperiod();
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i2c_sda_oe(busno, 1);
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i2c_halfperiod();
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}
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void i2c_stop(int busno)
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{
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/* First, make sure SCL is low, so that the target releases the SDA line */
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i2c_scl_o(busno, 0);
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i2c_halfperiod();
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/* Set SCL high then SDA high */
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i2c_sda_oe(busno, 1);
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i2c_scl_o(busno, 1);
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i2c_halfperiod();
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i2c_sda_oe(busno, 0);
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i2c_halfperiod();
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}
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int i2c_write(int busno, int b)
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{
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int i;
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/* MSB first */
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for(i=7;i>=0;i--) {
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/* Set SCL low and set our bit on SDA */
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i2c_scl_o(busno, 0);
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i2c_sda_oe(busno, b & (1 << i) ? 0 : 1);
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i2c_halfperiod();
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/* Set SCL high ; data is shifted on the rising edge of SCL */
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i2c_scl_o(busno, 1);
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i2c_halfperiod();
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}
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/* Check ack */
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/* Set SCL low, then release SDA so that the I2C target can respond */
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i2c_scl_o(busno, 0);
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i2c_halfperiod();
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i2c_sda_oe(busno, 0);
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/* Set SCL high and check for ack */
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i2c_scl_o(busno, 1);
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i2c_halfperiod();
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/* returns 1 if acked (I2C target pulled SDA low) */
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return !i2c_sda_i(busno);
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}
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int i2c_read(int busno, int ack)
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{
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int i;
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unsigned char b;
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/* Set SCL low first, otherwise setting SDA as input may cause a transition
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* on SDA with SCL high which will be interpreted as START/STOP condition.
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*/
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i2c_scl_o(busno, 0);
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i2c_halfperiod(); /* make sure SCL has settled low */
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i2c_sda_oe(busno, 0);
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b = 0;
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/* MSB first */
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for(i=7;i>=0;i--) {
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i2c_scl_o(busno, 0);
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i2c_halfperiod();
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/* Set SCL high and shift data */
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i2c_scl_o(busno, 1);
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i2c_halfperiod();
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if(i2c_sda_i(busno)) b |= (1 << i);
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}
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/* Send ack */
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/* Set SCL low and pull SDA low when acking */
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i2c_scl_o(busno, 0);
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if(ack)
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i2c_sda_oe(busno, 1);
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i2c_halfperiod();
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/* then set SCL high */
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i2c_scl_o(busno, 1);
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i2c_halfperiod();
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return b;
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}
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