mirror of https://github.com/m-labs/artiq.git
19 lines
498 B
Rust
19 lines
498 B
Rust
use csr;
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pub fn wait_init() {
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info!("waiting for AMC/RTM serwb bridge to be ready...");
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unsafe {
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while csr::serwb_phy::control_ready_read() != 0 {}
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}
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info!("done.");
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// Try reading the identifier register on the other side of the bridge.
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let rtm_identifier = unsafe {
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csr::rtm_identifier::identifier_read()
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};
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if rtm_identifier != 0x5352544d {
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error!("incorrect RTM identifier: 0x{:08x}", rtm_identifier);
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// proceed anyway
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}
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}
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