mirror of https://github.com/m-labs/artiq
320 lines
9.6 KiB
Rust
320 lines
9.6 KiB
Rust
#![no_std]
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#![feature(lang_items, alloc, global_allocator, try_from, nonzero, nll)]
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extern crate alloc;
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extern crate cslice;
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#[macro_use]
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extern crate log;
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extern crate byteorder;
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extern crate fringe;
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extern crate managed;
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extern crate smoltcp;
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extern crate alloc_list;
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#[macro_use]
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extern crate std_artiq as std;
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extern crate logger_artiq;
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extern crate backtrace_artiq;
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#[macro_use]
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extern crate board;
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extern crate board_artiq;
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extern crate proto;
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extern crate amp;
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#[cfg(has_drtio)]
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extern crate drtioaux;
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use core::convert::TryFrom;
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use smoltcp::wire::{EthernetAddress, IpAddress, IpCidr};
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use board::irq;
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use board::config;
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#[cfg(has_ethmac)]
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use board::ethmac;
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use proto::{mgmt_proto, analyzer_proto, moninj_proto, rpc_proto, session_proto, kernel_proto};
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use amp::{mailbox, rpc_queue};
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#[cfg(has_rtio_core)]
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mod rtio_mgt;
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mod urc;
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mod sched;
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mod cache;
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mod rtio_dma;
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mod mgmt;
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mod profiler;
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mod kernel;
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mod kern_hwreq;
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mod watchdog;
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mod session;
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#[cfg(any(has_rtio_moninj, has_drtio))]
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mod moninj;
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#[cfg(has_rtio_analyzer)]
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mod analyzer;
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fn startup() {
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irq::set_ie(true);
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board::clock::init();
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info!("ARTIQ runtime starting...");
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info!("software version {}", include_str!(concat!(env!("OUT_DIR"), "/git-describe")));
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info!("gateware version {}", board::ident::read(&mut [0; 64]));
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match config::read_str("log_level", |r| r.map(|s| s.parse())) {
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Ok(Ok(log_level_filter)) => {
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info!("log level set to {} by `log_level` config key",
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log_level_filter);
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log::set_max_level(log_level_filter);
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}
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_ => info!("log level set to INFO by default")
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}
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match config::read_str("uart_log_level", |r| r.map(|s| s.parse())) {
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Ok(Ok(uart_log_level_filter)) => {
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info!("UART log level set to {} by `uart_log_level` config key",
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uart_log_level_filter);
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logger_artiq::BufferLogger::with(|logger|
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logger.set_uart_log_level(uart_log_level_filter));
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}
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_ => info!("UART log level set to INFO by default")
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}
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#[cfg(has_slave_fpga)]
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board_artiq::slave_fpga::load().expect("cannot load RTM FPGA gateware");
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#[cfg(has_serwb_phy_amc)]
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board_artiq::serwb::wait_init();
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#[cfg(has_uart)] {
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let t = board::clock::get_ms();
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info!("press 'e' to erase startup and idle kernels...");
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while board::clock::get_ms() < t + 1000 {
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if unsafe { board::csr::uart::rxtx_read() == b'e' } {
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config::remove("startup_kernel").unwrap();
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config::remove("idle_kernel").unwrap();
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info!("startup and idle kernels erased");
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break
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}
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}
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info!("continuing boot");
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}
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#[cfg(has_i2c)]
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board_artiq::i2c::init();
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#[cfg(si5324_as_synthesizer)]
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setup_si5324_as_synthesizer();
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#[cfg(has_hmc830_7043)]
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/* must be the first SPI init because of HMC830 SPI mode selection */
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board_artiq::hmc830_7043::init().expect("cannot initialize HMC830/7043");
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#[cfg(has_ad9154)]
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board_artiq::ad9154::init().expect("cannot initialize AD9154");
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#[cfg(has_allaki_atts)]
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board_artiq::hmc542::program_all(8/*=4dB*/);
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#[cfg(has_ethmac)]
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startup_ethernet();
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#[cfg(not(has_ethmac))]
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{
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info!("done");
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loop {}
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}
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}
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#[cfg(si5324_as_synthesizer)]
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fn setup_si5324_as_synthesizer()
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{
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// 125MHz output, from 100MHz CLKIN2 reference, 586 Hz
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#[cfg(all(rtio_frequency = "125.0", si5324_ext_ref))]
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const SI5324_SETTINGS: board_artiq::si5324::FrequencySettings
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= board_artiq::si5324::FrequencySettings {
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n1_hs : 10,
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nc1_ls : 4,
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n2_hs : 10,
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n2_ls : 260,
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n31 : 65,
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n32 : 52,
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bwsel : 4,
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crystal_ref: false
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};
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// 125MHz output, from crystal, 7 Hz
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#[cfg(all(rtio_frequency = "125.0", not(si5324_ext_ref)))]
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const SI5324_SETTINGS: board_artiq::si5324::FrequencySettings
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= board_artiq::si5324::FrequencySettings {
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n1_hs : 10,
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nc1_ls : 4,
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n2_hs : 10,
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n2_ls : 19972,
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n31 : 4993,
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n32 : 4565,
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bwsel : 4,
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crystal_ref: true
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};
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// 150MHz output, from crystal
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#[cfg(all(rtio_frequency = "150.0", not(si5324_ext_ref)))]
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const SI5324_SETTINGS: board_artiq::si5324::FrequencySettings
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= board_artiq::si5324::FrequencySettings {
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n1_hs : 9,
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nc1_ls : 4,
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n2_hs : 10,
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n2_ls : 33732,
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n31 : 9370,
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n32 : 7139,
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bwsel : 3,
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crystal_ref: true
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};
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board_artiq::si5324::setup(&SI5324_SETTINGS,
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board_artiq::si5324::Input::Ckin2).expect("cannot initialize Si5324");
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}
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#[cfg(has_ethmac)]
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fn startup_ethernet() {
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let hardware_addr;
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match config::read_str("mac", |r| r.map(|s| s.parse())) {
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Ok(Ok(addr)) => {
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hardware_addr = addr;
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info!("using MAC address {}", hardware_addr);
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}
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_ => {
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hardware_addr = EthernetAddress([0x02, 0x00, 0x00, 0x00, 0x00, 0x01]);
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warn!("using default MAC address {}; consider changing it", hardware_addr);
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}
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}
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let protocol_addr;
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match config::read_str("ip", |r| r.map(|s| s.parse())) {
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Ok(Ok(addr)) => {
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protocol_addr = addr;
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info!("using IP address {}", protocol_addr);
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}
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_ => {
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protocol_addr = IpAddress::v4(192, 168, 1, 50);
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info!("using default IP address {}", protocol_addr);
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}
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}
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let mut net_device = unsafe { ethmac::EthernetDevice::new() };
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net_device.reset_phy_if_any();
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let net_device = {
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use smoltcp::wire::PrettyPrinter;
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use smoltcp::wire::EthernetFrame;
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fn net_trace_writer(timestamp: u64, printer: PrettyPrinter<EthernetFrame<&[u8]>>) {
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let seconds = timestamp / 1000;
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let micros = timestamp % 1000 * 1000;
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print!("\x1b[37m[{:6}.{:06}s]\n{}\x1b[0m\n", seconds, micros, printer)
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}
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fn net_trace_silent(_timestamp: u64, _printer: PrettyPrinter<EthernetFrame<&[u8]>>) {}
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let net_trace_fn: fn(u64, PrettyPrinter<EthernetFrame<&[u8]>>);
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match config::read_str("net_trace", |r| r.map(|s| s == "1")) {
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Ok(true) => net_trace_fn = net_trace_writer,
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_ => net_trace_fn = net_trace_silent
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}
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smoltcp::phy::EthernetTracer::new(net_device, net_trace_fn)
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};
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let mut neighbor_map = [None; 8];
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let neighbor_cache =
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smoltcp::iface::NeighborCache::new(&mut neighbor_map[..]);
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let mut interface =
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smoltcp::iface::EthernetInterfaceBuilder::new(net_device)
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.neighbor_cache(neighbor_cache)
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.ethernet_addr(hardware_addr)
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.ip_addrs([IpCidr::new(protocol_addr, 0)])
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.finalize();
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let mut scheduler = sched::Scheduler::new();
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let io = scheduler.io();
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#[cfg(has_rtio_core)]
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rtio_mgt::startup(&io);
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io.spawn(4096, mgmt::thread);
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io.spawn(16384, session::thread);
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#[cfg(any(has_rtio_moninj, has_drtio))]
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io.spawn(4096, moninj::thread);
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#[cfg(has_rtio_analyzer)]
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io.spawn(4096, analyzer::thread);
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let mut net_stats = ethmac::EthernetStatistics::new();
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loop {
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scheduler.run();
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{
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let sockets = &mut *scheduler.sockets().borrow_mut();
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loop {
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match interface.poll(sockets, board::clock::get_ms()) {
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Ok(true) => (),
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Ok(false) => break,
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Err(smoltcp::Error::Unrecognized) => (),
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Err(err) => debug!("network error: {}", err)
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}
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}
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}
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if let Some(_net_stats_diff) = net_stats.update() {
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debug!("ethernet mac:{}", ethmac::EthernetStatistics::new());
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}
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}
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}
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#[global_allocator]
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static mut ALLOC: alloc_list::ListAlloc = alloc_list::EMPTY;
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static mut LOG_BUFFER: [u8; 1<<17] = [0; 1<<17];
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#[no_mangle]
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pub extern fn main() -> i32 {
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unsafe {
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extern {
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static mut _fheap: u8;
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static mut _eheap: u8;
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}
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ALLOC.add_range(&mut _fheap, &mut _eheap);
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logger_artiq::BufferLogger::new(&mut LOG_BUFFER[..]).register(startup);
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0
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}
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}
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#[no_mangle]
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pub extern fn exception(vect: u32, _regs: *const u32, pc: u32, ea: u32) {
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let vect = irq::Exception::try_from(vect).expect("unknown exception");
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match vect {
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irq::Exception::Interrupt =>
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while irq::pending_mask() != 0 {
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match () {
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#[cfg(has_timer1)]
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() if irq::is_pending(::board::csr::TIMER1_INTERRUPT) =>
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profiler::sample(pc as usize),
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_ => panic!("spurious irq {}", irq::pending_mask().trailing_zeros())
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}
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},
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_ => panic!("exception {:?} at PC 0x{:x}, EA 0x{:x}", vect, pc, ea)
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}
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}
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#[no_mangle]
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pub extern fn abort() {
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println!("aborted");
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loop {}
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}
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#[no_mangle]
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#[lang = "panic_fmt"]
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pub extern fn panic_fmt(args: core::fmt::Arguments, file: &'static str, line: u32) -> ! {
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println!("panic at {}:{}: {}", file, line, args);
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println!("backtrace for software version {}:",
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include_str!(concat!(env!("OUT_DIR"), "/git-describe")));
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let _ = backtrace_artiq::backtrace(|ip| {
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println!("{:#08x}", ip);
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});
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if config::read_str("panic_reset", |r| r == Ok("1")) {
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println!("restarting...");
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unsafe { board::boot::reset() }
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} else {
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println!("halting.");
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println!("use `artiq_coreconfig write -s panic_reset 1` to restart instead");
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loop {}
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}
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}
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