mirror of https://github.com/m-labs/artiq.git
68 lines
1.9 KiB
C
68 lines
1.9 KiB
C
#include <generated/csr.h>
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#include <stdio.h>
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#include "rtio.h"
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#include "dds.h"
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void dds_init(void)
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{
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int i;
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for(i=0;i<8;i++) {
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DDS_WRITE(DDS_GPIO, i);
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DDS_WRITE(DDS_GPIO, i | (1 << 7));
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DDS_WRITE(DDS_GPIO, i);
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dds_phase_clear_en(i, 0);
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}
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}
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void dds_phase_clear_en(int channel, int phase_clear_en)
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{
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DDS_WRITE(0x00, 0x78);
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DDS_WRITE(0x01, 0x00);
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DDS_WRITE(0x02, phase_clear_en ? 0x40 : 0x00);
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DDS_WRITE(0x03, 0x00);
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}
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/*
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* DDS phase modes:
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* - continuous: Set sysclk_per_microcycle=0 to disable POW alteration.
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* phase_tracking is ignored, set to 0.
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* Disable phase accumulator clearing prior to programming.
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* - absolute: Set sysclk_per_microcycle to its nominal value
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* and phase_tracking=0.
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* Enable phase accumulator clearing prior to programming.
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* - tracking: Set sysclk_per_microcycle to its nominal value
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* and phase_tracking=1.
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* Enable phase accumulator clearing prior to programming.
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*/
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void dds_program(long long int timestamp, int channel,
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unsigned int ftw, unsigned int pow, unsigned int sysclk_per_microcycle,
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int rt_fud, int phase_tracking)
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{
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long long int fud_time;
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unsigned int phase_time_offset;
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rtio_fud_sync();
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DDS_WRITE(DDS_GPIO, channel);
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DDS_WRITE(DDS_FTW0, ftw & 0xff);
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DDS_WRITE(DDS_FTW1, (ftw >> 8) & 0xff);
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DDS_WRITE(DDS_FTW2, (ftw >> 16) & 0xff);
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DDS_WRITE(DDS_FTW3, (ftw >> 24) & 0xff);
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phase_time_offset = phase_tracking ? timestamp : 0;
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if(rt_fud)
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fud_time = timestamp;
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else {
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fud_time = rtio_get_counter() + 8000;
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/* POW is mod 2**14, so wraparound on negative values is OK */
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phase_time_offset -= timestamp - fud_time;
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}
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pow += phase_time_offset*ftw*sysclk_per_microcycle >> 18;
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DDS_WRITE(DDS_POW0, pow & 0xff);
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DDS_WRITE(DDS_POW1, (pow >> 8) & 0x3f);
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rtio_fud(fud_time);
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}
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