mirror of https://github.com/m-labs/artiq
593 lines
23 KiB
Python
Executable File
593 lines
23 KiB
Python
Executable File
#!/usr/bin/env python3
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import argparse
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import sys
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import json
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import textwrap
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from collections import defaultdict
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from itertools import count
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from artiq import __version__ as artiq_version
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def process_header(output, description):
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if description["target"] != "kasli":
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raise NotImplementedError
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print(textwrap.dedent("""
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# Autogenerated for the {variant} variant
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core_addr = "{core_addr}"
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device_db = {{
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"core": {{
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"type": "local",
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"module": "artiq.coredevice.core",
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"class": "Core",
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"arguments": {{"host": core_addr, "ref_period": {ref_period}}}
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}},
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"core_log": {{
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"type": "controller",
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"host": "::1",
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"port": 1068,
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"command": "aqctl_corelog -p {{port}} --bind {{bind}} " + core_addr
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}},
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"core_cache": {{
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"type": "local",
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"module": "artiq.coredevice.cache",
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"class": "CoreCache"
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}},
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"core_dma": {{
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"type": "local",
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"module": "artiq.coredevice.dma",
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"class": "CoreDMA"
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}},
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"i2c_switch0": {{
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"type": "local",
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"module": "artiq.coredevice.i2c",
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"class": "PCA9548",
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"arguments": {{"address": 0xe0}}
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}},
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"i2c_switch1": {{
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"type": "local",
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"module": "artiq.coredevice.i2c",
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"class": "PCA9548",
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"arguments": {{"address": 0xe2}}
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}},
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}}
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""").format(
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variant=description["variant"],
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core_addr=description.get("core_addr", "192.168.1.70"),
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ref_period=1/(8*description.get("rtio_frequency", 125e6))),
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file=output)
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class PeripheralManager:
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def __init__(self, output, master_description):
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self.counts = defaultdict(int)
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self.output = output
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self.master_description = master_description
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def get_name(self, ty):
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count = self.counts[ty]
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self.counts[ty] = count + 1
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return "{}{}".format(ty, count)
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def gen(self, string, **kwargs):
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print(textwrap.dedent(string).format(**kwargs), file=self.output)
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def process_dio(self, rtio_offset, peripheral):
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class_names = {
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"input": "TTLInOut",
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"output": "TTLOut"
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}
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classes = [
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class_names[peripheral["bank_direction_low"]],
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class_names[peripheral["bank_direction_high"]]
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]
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channel = count(0)
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for i in range(8):
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self.gen("""
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device_db["{name}"] = {{
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "{class_name}",
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"arguments": {{"channel": 0x{channel:06x}}},
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}}
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""",
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name=self.get_name("ttl"),
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class_name=classes[i//4],
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channel=rtio_offset+next(channel))
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if peripheral.get("edge_counter", False):
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for i in range(8):
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class_name = classes[i//4]
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if class_name == "TTLInOut":
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self.gen("""
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device_db["{name}"] = {{
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"type": "local",
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"module": "artiq.coredevice.edge_counter",
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"class": "EdgeCounter",
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"arguments": {{"channel": 0x{channel:06x}}},
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}}
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""",
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name=self.get_name("ttl_counter"),
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channel=rtio_offset+next(channel))
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return next(channel)
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def process_urukul(self, rtio_offset, peripheral):
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urukul_name = self.get_name("urukul")
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synchronization = peripheral.get("synchronization", False)
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channel = count(0)
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self.gen("""
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device_db["eeprom_{name}"]={{
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"type": "local",
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"module": "artiq.coredevice.kasli_i2c",
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"class": "KasliEEPROM",
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"arguments": {{"port": "EEM{eem}"}}
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}}
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device_db["spi_{name}"]={{
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {{"channel": 0x{channel:06x}}}
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}}""",
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name=urukul_name,
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eem=peripheral["ports"][0],
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channel=rtio_offset+next(channel))
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if synchronization:
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self.gen("""
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device_db["ttl_{name}_sync"] = {{
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLClockGen",
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"arguments": {{"channel": 0x{channel:06x}, "acc_width": 4}}
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}}""",
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name=urukul_name,
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channel=rtio_offset+next(channel))
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self.gen("""
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device_db["ttl_{name}_io_update"] = {{
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {{"channel": 0x{channel:06x}}}
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}}""",
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name=urukul_name,
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channel=rtio_offset+next(channel))
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if len(peripheral["ports"]) > 1:
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for i in range(4):
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self.gen("""
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device_db["ttl_{name}_sw{uchn}"] = {{
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {{"channel": 0x{channel:06x}}}
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}}""",
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name=urukul_name,
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uchn=i,
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channel=rtio_offset+next(channel))
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self.gen("""
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device_db["{name}_cpld"] = {{
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"type": "local",
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"module": "artiq.coredevice.urukul",
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"class": "CPLD",
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"arguments": {{
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"spi_device": "spi_{name}",
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"sync_device": {sync_device},
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"io_update_device": "ttl_{name}_io_update",
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"refclk": {refclk},
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"clk_sel": {clk_sel}
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}}
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}}""",
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name=urukul_name,
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sync_device="\"ttl_{name}_sync\"".format(name=urukul_name) if synchronization else "None",
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refclk=peripheral.get("refclk", self.master_description.get("rtio_frequency", 125e6)),
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clk_sel=peripheral["clk_sel"])
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dds = peripheral.get("dds", "ad9910")
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pll_vco = peripheral.get("pll_vco", None)
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for i in range(4):
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if dds == "ad9910":
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self.gen("""
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device_db["{name}_ch{uchn}"] = {{
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"type": "local",
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"module": "artiq.coredevice.ad9910",
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"class": "AD9910",
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"arguments": {{
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"pll_n": {pll_n},
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"chip_select": {chip_select},
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"cpld_device": "{name}_cpld"{sw}{pll_vco}{sync_delay_seed}{io_update_delay}
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}}
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}}""",
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name=urukul_name,
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chip_select=4 + i,
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uchn=i,
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sw=",\n \"sw_device\": \"ttl_{name}_sw{uchn}\"".format(name=urukul_name, uchn=i) if len(peripheral["ports"]) > 1 else "",
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pll_vco=",\n \"pll_vco\": {}".format(pll_vco) if pll_vco is not None else "",
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pll_n=peripheral.get("pll_n", 32),
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sync_delay_seed=",\n \"sync_delay_seed\": \"eeprom_{}:{}\"".format(urukul_name, 64 + 4*i) if synchronization else "",
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io_update_delay=",\n \"io_update_delay\": \"eeprom_{}:{}\"".format(urukul_name, 64 + 4*i) if synchronization else "")
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elif dds == "ad9912":
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self.gen("""
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device_db["{name}_ch{uchn}"] = {{
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"type": "local",
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"module": "artiq.coredevice.ad9912",
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"class": "AD9912",
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"arguments": {{
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"pll_n": {pll_n},
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"chip_select": {chip_select},
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"cpld_device": "{name}_cpld"{sw}{pll_vco}
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}}
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}}""",
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name=urukul_name,
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chip_select=4 + i,
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uchn=i,
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sw=",\n \"sw_device\": \"ttl_{name}_sw{uchn}\"".format(name=urukul_name, uchn=i) if len(peripheral["ports"]) > 1 else "",
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pll_vco=",\n \"pll_vco\": {}".format(pll_vco) if pll_vco is not None else "",
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pll_n=peripheral.get("pll_n", 8))
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else:
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raise ValueError
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return next(channel)
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def process_mirny(self, rtio_offset, peripheral):
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mirny_name = self.get_name("mirny")
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channel = count(0)
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self.gen("""
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device_db["spi_{name}"]={{
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {{"channel": 0x{channel:06x}}}
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}}""",
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name=mirny_name,
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channel=rtio_offset+next(channel))
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for i in range(4):
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self.gen("""
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device_db["ttl_{name}_sw{mchn}"] = {{
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {{"channel": 0x{ttl_channel:06x}}}
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}}""",
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name=mirny_name,
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mchn=i,
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ttl_channel=rtio_offset+next(channel))
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for i in range(4):
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self.gen("""
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device_db["{name}_ch{mchn}"] = {{
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"type": "local",
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"module": "artiq.coredevice.adf5356",
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"class": "ADF5356",
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"arguments": {{
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"channel": {mchn},
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"sw_device": "ttl_{name}_sw{mchn}",
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"cpld_device": "{name}_cpld",
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}}
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}}""",
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name=mirny_name,
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mchn=i)
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self.gen("""
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device_db["{name}_cpld"] = {{
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"type": "local",
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"module": "artiq.coredevice.mirny",
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"class": "Mirny",
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"arguments": {{
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"spi_device": "spi_{name}",
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"refclk": {refclk},
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"clk_sel": {clk_sel}
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}},
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}}""",
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name=mirny_name,
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refclk=peripheral.get("refclk", 100e6),
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clk_sel=peripheral.get("clk_sel", 0))
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return next(channel)
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def process_novogorny(self, rtio_offset, peripheral):
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self.gen("""
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device_db["spi_{name}_adc"] = {{
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {{"channel": 0x{adc_channel:06x}}}
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}}
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device_db["ttl_{name}_cnv"] = {{
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {{"channel": 0x{cnv_channel:06x}}},
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}}
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device_db["{name}"] = {{
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"type": "local",
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"module": "artiq.coredevice.novogorny",
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"class": "Novogorny",
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"arguments": {{
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"spi_adc_device": "spi_{name}_adc",
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"cnv_device": "ttl_{name}_cnv"
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}}
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}}""",
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name=self.get_name("novogorny"),
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adc_channel=rtio_offset,
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cnv_channel=rtio_offset + 1)
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return 2
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def process_sampler(self, rtio_offset, peripheral):
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self.gen("""
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device_db["spi_{name}_adc"] = {{
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {{"channel": 0x{adc_channel:06x}}}
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}}
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device_db["spi_{name}_pgia"] = {{
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {{"channel": 0x{pgia_channel:06x}}}
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}}
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device_db["ttl_{name}_cnv"] = {{
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {{"channel": 0x{cnv_channel:06x}}},
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}}
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device_db["{name}"] = {{
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"type": "local",
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"module": "artiq.coredevice.sampler",
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"class": "Sampler",
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"arguments": {{
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"spi_adc_device": "spi_{name}_adc",
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"spi_pgia_device": "spi_{name}_pgia",
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"cnv_device": "ttl_{name}_cnv"
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}}
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}}""",
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name=self.get_name("sampler"),
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adc_channel=rtio_offset,
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pgia_channel=rtio_offset + 1,
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cnv_channel=rtio_offset + 2)
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return 3
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def process_suservo(self, rtio_offset, peripheral):
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suservo_name = self.get_name("suservo")
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sampler_name = self.get_name("sampler")
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urukul0_name = self.get_name("urukul")
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urukul1_name = self.get_name("urukul")
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channel = count(0)
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for i in range(8):
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self.gen("""
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device_db["{suservo_name}_ch{suservo_chn}"] = {{
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"type": "local",
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"module": "artiq.coredevice.suservo",
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"class": "Channel",
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"arguments": {{"channel": 0x{suservo_channel:06x}, "servo_device": "{suservo_name}"}}
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}}""",
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suservo_name=suservo_name,
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suservo_chn=i,
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suservo_channel=rtio_offset+next(channel))
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self.gen("""
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device_db["{suservo_name}"] = {{
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"type": "local",
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"module": "artiq.coredevice.suservo",
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"class": "SUServo",
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"arguments": {{
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"channel": 0x{suservo_channel:06x},
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"pgia_device": "spi_{sampler_name}_pgia",
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"cpld0_device": "{urukul0_name}_cpld",
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"cpld1_device": "{urukul1_name}_cpld",
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"dds0_device": "{urukul0_name}_dds",
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"dds1_device": "{urukul1_name}_dds"
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}}
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}}""",
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suservo_name=suservo_name,
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sampler_name=sampler_name,
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urukul0_name=urukul0_name,
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urukul1_name=urukul1_name,
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suservo_channel=rtio_offset+next(channel))
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self.gen("""
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device_db["spi_{sampler_name}_pgia"] = {{
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {{"channel": 0x{sampler_channel:06x}}}
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}}""",
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sampler_name=sampler_name,
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sampler_channel=rtio_offset+next(channel))
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pll_vco = peripheral.get("pll_vco", None)
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for urukul_name in (urukul0_name, urukul1_name):
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self.gen("""
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device_db["spi_{urukul_name}"] = {{
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {{"channel": 0x{urukul_channel:06x}}}
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}}
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device_db["{urukul_name}_cpld"] = {{
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"type": "local",
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"module": "artiq.coredevice.urukul",
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"class": "CPLD",
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"arguments": {{
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"spi_device": "spi_{urukul_name}",
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"refclk": {refclk},
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"clk_sel": {clk_sel}
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}}
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}}
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device_db["{urukul_name}_dds"] = {{
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"type": "local",
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"module": "artiq.coredevice.ad9910",
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"class": "AD9910",
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"arguments": {{
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"pll_n": {pll_n},
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"chip_select": 3,
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"cpld_device": "{urukul_name}_cpld"{pll_vco}
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}}
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}}""",
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urukul_name=urukul_name,
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urukul_channel=rtio_offset+next(channel),
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refclk=peripheral.get("refclk", self.master_description.get("rtio_frequency", 125e6)),
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clk_sel=peripheral["clk_sel"],
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pll_vco=",\n \"pll_vco\": {}".format(pll_vco) if pll_vco is not None else "",
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pll_n=peripheral.get("pll_n", 32))
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return next(channel)
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def process_zotino(self, rtio_offset, peripheral):
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self.gen("""
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device_db["spi_{name}"] = {{
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {{"channel": 0x{spi_channel:06x}}}
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}}
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device_db["ttl_{name}_ldac"] = {{
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {{"channel": 0x{ldac_channel:06x}}}
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}}
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device_db["ttl_{name}_clr"] = {{
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {{"channel": 0x{clr_channel:06x}}}
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}}
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device_db["{name}"] = {{
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"type": "local",
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"module": "artiq.coredevice.zotino",
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"class": "Zotino",
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"arguments": {{
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"spi_device": "spi_{name}",
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"ldac_device": "ttl_{name}_ldac",
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"clr_device": "ttl_{name}_clr"
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}}
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}}""",
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name=self.get_name("zotino"),
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spi_channel=rtio_offset,
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ldac_channel=rtio_offset + 1,
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clr_channel=rtio_offset + 2)
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return 3
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def process_grabber(self, rtio_offset, peripheral):
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self.gen("""
|
|
device_db["{name}"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.grabber",
|
|
"class": "Grabber",
|
|
"arguments": {{"channel_base": 0x{channel:06x}}}
|
|
}}""",
|
|
name=self.get_name("grabber"),
|
|
channel=rtio_offset)
|
|
return 2
|
|
|
|
def process_fastino(self, rtio_offset, peripheral):
|
|
self.gen("""
|
|
device_db["{name}"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.fastino",
|
|
"class": "Fastino",
|
|
"arguments": {{"channel": 0x{channel:06x}}}
|
|
}}""",
|
|
name=self.get_name("fastino"),
|
|
channel=rtio_offset)
|
|
return 1
|
|
|
|
def process_phaser(self, rtio_offset, peripheral):
|
|
self.gen("""
|
|
device_db["{name}"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.phaser",
|
|
"class": "Phaser",
|
|
"arguments": {{
|
|
"channel_base": 0x{channel:06x},
|
|
"miso_delay": 1,
|
|
}}
|
|
}}""",
|
|
name=self.get_name("phaser"),
|
|
channel=rtio_offset)
|
|
return 5
|
|
|
|
def process(self, rtio_offset, peripheral):
|
|
processor = getattr(self, "process_"+str(peripheral["type"]))
|
|
return processor(rtio_offset, peripheral)
|
|
|
|
def add_sfp_leds(self, rtio_offset):
|
|
for i in range(2):
|
|
self.gen("""
|
|
device_db["{name}"] = {{
|
|
"type": "local",
|
|
"module": "artiq.coredevice.ttl",
|
|
"class": "TTLOut",
|
|
"arguments": {{"channel": 0x{channel:06x}}}
|
|
}}""",
|
|
name=self.get_name("led"),
|
|
channel=rtio_offset+i)
|
|
return 2
|
|
|
|
|
|
def process(output, master_description, satellites):
|
|
base = master_description["base"]
|
|
if base not in ("standalone", "master"):
|
|
raise ValueError("Invalid master base")
|
|
|
|
if base == "standalone" and satellites:
|
|
raise ValueError("A standalone system cannot have satellites")
|
|
|
|
process_header(output, master_description)
|
|
|
|
pm = PeripheralManager(output, master_description)
|
|
|
|
print("# {} peripherals".format(base), file=output)
|
|
rtio_offset = 0
|
|
for peripheral in master_description["peripherals"]:
|
|
n_channels = pm.process(rtio_offset, peripheral)
|
|
rtio_offset += n_channels
|
|
if base == "standalone" and master_description["hw_rev"] in ("v1.0", "v1.1"):
|
|
n_channels = pm.add_sfp_leds(rtio_offset)
|
|
rtio_offset += n_channels
|
|
|
|
for destination, description in satellites:
|
|
if description["base"] != "satellite":
|
|
raise ValueError("Invalid base for satellite at destination {}".format(destination))
|
|
|
|
print("# DEST#{} peripherals".format(destination), file=output)
|
|
rtio_offset = destination << 16
|
|
for peripheral in description["peripherals"]:
|
|
n_channels = pm.process(rtio_offset, peripheral)
|
|
rtio_offset += n_channels
|
|
|
|
|
|
def main():
|
|
parser = argparse.ArgumentParser(
|
|
description="ARTIQ device database template builder")
|
|
parser.add_argument("--version", action="version",
|
|
version="ARTIQ v{}".format(artiq_version),
|
|
help="print the ARTIQ version number")
|
|
parser.add_argument("master_description", metavar="MASTER_DESCRIPTION",
|
|
help="JSON system description file for the standalone or master node")
|
|
parser.add_argument("-o", "--output",
|
|
help="output file, defaults to standard output if omitted")
|
|
parser.add_argument("-s", "--satellite", nargs=2, action="append",
|
|
default=[], metavar=("DESTINATION", "DESCRIPTION"), type=str,
|
|
help="add DRTIO satellite at the given destination number with "
|
|
"devices from the given JSON description")
|
|
|
|
args = parser.parse_args()
|
|
|
|
with open(args.master_description, "r") as f:
|
|
master_description = json.load(f)
|
|
|
|
satellites = []
|
|
for destination, description in args.satellite:
|
|
with open(description, "r") as f:
|
|
satellites.append((int(destination, 0), json.load(f)))
|
|
|
|
if args.output is not None:
|
|
with open(args.output, "w") as f:
|
|
process(f, master_description, satellites)
|
|
else:
|
|
process(sys.stdout, master_description, satellites)
|
|
|
|
|
|
if __name__ == "__main__":
|
|
main()
|