mirror of https://github.com/m-labs/artiq.git
29 lines
791 B
Python
29 lines
791 B
Python
from migen.build.generic_platform import *
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from artiq.coredevice.fmcdio_vhdci_eem import *
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io = [
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("fmcdio_dirctl", 0,
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Subsignal("clk", Pins("LPC:LA32_N")),
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Subsignal("ser", Pins("LPC:LA33_P")),
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Subsignal("latch", Pins("LPC:LA32_P")),
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IOStandard("LVCMOS18")
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),
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]
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def _get_connectors():
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connectors = []
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for i in range(4):
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connections = dict()
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for j, pair in enumerate(eem_fmc_connections[i]):
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for pn in "n", "p":
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cc = "cc_" if j == 0 else ""
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connections["d{}_{}{}".format(j, cc, pn)] = \
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"LPC:LA{:02d}_{}{}".format(pair, cc.upper(), pn.upper())
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connectors.append(("eem{}".format(i), connections))
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return connectors
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connectors = _get_connectors()
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