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337 lines
12 KiB
ReStructuredText
337 lines
12 KiB
ReStructuredText
Installing ARTIQ
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================
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The preferred way of installing ARTIQ is through the use of the conda package manager.
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The conda package contains pre-built binaries that you can directly flash to your board.
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But you can also :ref:`install from sources <install-from-sources>`.
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.. note:: Only the linux-64 and linux-32 conda packages contain the FPGA/BIOS/runtime pre-built binaries.
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Installing using conda
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----------------------
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Installing Anaconda or Miniconda
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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* You can either install Anaconda (chose Python 3.4) from https://store.continuum.io/cshop/anaconda/
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* Or install the more minimalistic Miniconda (chose Python3.4) from http://conda.pydata.org/miniconda.html
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After installing either Anaconda or Miniconda, open a new terminal and make sure the following command works::
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$ conda
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If it prints the help of the ``conda`` command, your install is OK.
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If not, then make sure your ``$PATH`` environment variable contains the path to anaconda3/bin (or miniconda3/bin)::
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$ echo $PATH
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/home/fallen/miniconda3/bin:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games
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If your ``$PATH`` misses reference the miniconda3/bin or anaconda3/bin you can fix this by typing::
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$ export PATH=$HOME/miniconda3:$PATH
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Installing the host side software
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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For this, you need to add our binstar repository to your conda configuration::
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$ conda config --add channels http://conda.anaconda.org/fallen/channel/dev
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Then you can install the ARTIQ package, it will pull all the necessary dependencies::
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$ conda install artiq
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Preparing the core device FPGA board
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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You now need to flash 3 things on the FPGA board:
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1. The FPGA bitstream
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2. The BIOS
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3. The ARTIQ runtime
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First you need to :ref:`install xc3sprog <install-xc3sprog>`. Then, you can flash the board:
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* For the Pipistrello board::
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$ artiq_flash.sh -t pipistrello
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* For the KC705 board::
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$ artiq_flash.sh
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Next step (for KC705) is to flash MAC and IP addresses to the board:
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* See :ref:`those instructions <flash-mac-ip-addr>` to flash MAC and IP addresses.
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.. _install-from-sources:
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Installing from source
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----------------------
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You can skip the first two steps if you already installed from conda.
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Preparing the build environment for the core device
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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These steps are required to generate code that can run on the core
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device. They are necessary both for building the MiSoC BIOS
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and the ARTIQ kernels.
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* Create a development directory: ::
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$ mkdir ~/artiq-dev
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* Install OpenRISC binutils (or1k-linux-...): ::
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$ cd ~/artiq-dev
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$ wget https://ftp.gnu.org/gnu/binutils/binutils-2.25.1.tar.bz2
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$ tar xvf binutils-2.25.1.tar.bz2
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$ rm binutils-2.25.1.tar.bz2
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$ mkdir binutils-2.25.1/build
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$ cd binutils-2.25.1/build
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$ ../configure --target=or1k-linux --prefix=/usr/local
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$ make -j4
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$ sudo make install
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.. note::
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We're using an ``or1k-linux`` target because it is necessary to enable
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shared library support in ``ld``, not because Linux is involved.
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* Install LLVM and Clang: ::
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$ cd ~/artiq-dev
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$ git clone https://github.com/openrisc/llvm-or1k
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$ cd llvm-or1k/tools
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$ git clone https://github.com/openrisc/clang-or1k clang
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$ cd ..
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$ mkdir build
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$ cd build
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$ cmake .. -DCMAKE_INSTALL_PREFIX=/usr/local/llvm-or1k -DLLVM_TARGETS_TO_BUILD="OR1K;X86" -DCMAKE_BUILD_TYPE=Rel -DLLVM_ENABLE_ASSERTIONS=ON
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$ make -j4
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$ sudo make install
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.. note::
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Compilation of LLVM can take more than 30 min on some machines.
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Preparing the core device FPGA board
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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These steps are required to generate bitstream (``.bit``) files, build the MiSoC BIOS and ARTIQ runtime, and flash FPGA boards. If the board is already flashed, you may skip those steps and go directly to `Installing the host-side software`.
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* Install the FPGA vendor tools (e.g. Xilinx ISE and/or Vivado):
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* Get Xilinx tools from http://www.xilinx.com/support/download/index.htm. ISE can build bitstreams both for boards using the Spartan-6 (Pipistrello) and 7-series devices (KC705), while Vivado supports only boards using 7-series devices.
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* The Pipistrello is supported by Webpack, the KC705 is not.
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* During the Xilinx toolchain installation, uncheck ``Install cable drivers`` (they are not required as we use better and open source alternatives).
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* Install Migen: ::
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$ cd ~/artiq-dev
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$ git clone https://github.com/m-labs/migen
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$ cd migen
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$ python3 setup.py develop --user
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.. note::
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The options ``develop`` and ``--user`` are for setup.py to install Migen in ``~/.local/lib/python3.4``.
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.. _install-xc3sprog:
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* Install JTAG tools needed to program the Pipistrello and KC705:
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::
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$ cd ~/artiq-dev
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$ svn co http://svn.code.sf.net/p/xc3sprog/code/trunk xc3sprog
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$ cd xc3sprog
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$ cmake . && make
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$ sudo make install
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.. note::
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It is safe to ignore the message "Could NOT find LIBFTD2XX" (libftd2xx is different from libftdi, and is not required).
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.. _install-flash-proxy:
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* Install the required flash proxy bitstreams:
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The purpose of the flash proxy bitstream is to give programming software fast JTAG access to the flash connected to the FPGA.
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* Pipistrello:
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::
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$ cd ~/artiq-dev
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$ wget http://www.phys.ethz.ch/~robertjo/bscan_spi_lx45_csg324.bit
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Then copy ``~/artiq-dev/bscan_spi_lx45_csg324.bit`` to ``~/.migen``, ``/usr/local/share/migen`` or ``/usr/share/migen``.
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* KC705:
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::
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$ cd ~/artiq-dev
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$ git clone https://github.com/m-labs/bscan_spi_kc705
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$ cd bscan_spi_kc705
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$ make
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Then copy the generated ``bscan_spi_kc705.bit`` to ``~/.migen``, ``/usr/local/share/migen`` or ``/usr/share/migen``.
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* Download MiSoC: ::
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$ cd ~/artiq-dev
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$ git clone --recursive https://github.com/m-labs/misoc
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$ export MSCDIR=~/artiq-dev/misoc # append this line to .bashrc
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* Download and install ARTIQ: ::
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$ cd ~/artiq-dev
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$ git clone https://github.com/m-labs/artiq
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$ python3 setup.py develop --user
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* Build and flash the bitstream and BIOS by running `from the MiSoC top-level directory`:
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::
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$ cd ~/artiq-dev/misoc
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$ export PATH=$PATH:/usr/local/llvm-or1k/bin
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* For Pipistrello::
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$ ./make.py -X ~/artiq-dev/artiq/soc -t artiq_pipistrello all
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* For KC705::
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$ ./make.py -X ~/artiq-dev/artiq/soc -t artiq_kc705 all
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* Then, build and flash the ARTIQ runtime: ::
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$ cd ~/artiq-dev/artiq/soc/runtime && make runtime.fbi
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$ ~/artiq-dev/artiq/artiq/frontend/artiq_flash.sh -t pipistrello -d $PWD -r
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.. note:: The `-t` option specifies the board your are targeting. Available options are ``kc705`` and ``pipistrello``.
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* Check that the board boots by running a serial terminal program (you may need to press its FPGA reconfiguration button or power-cycle it to load the bitstream that was newly written into the flash): ::
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$ make -C ~/artiq-dev/misoc/tools # do only once
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$ ~/artiq-dev/misoc/tools/flterm --port /dev/ttyUSB1
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MiSoC BIOS http://m-labs.hk
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[...]
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Booting from flash...
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Loading xxxxx bytes from flash...
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Executing booted program.
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ARTIQ runtime built <date/time>
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The communication parameters are 115200 8-N-1.
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.. _flash-mac-ip-addr:
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* Set the MAC and IP address in the :ref:`core device configuration flash storage <core-device-flash-storage>`:
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* You can either set it by generating a flash storage image and then flash it: ::
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$ artiq_mkfs flash_storage.img -s mac xx:xx:xx:xx:xx:xx -s ip xx.xx.xx.xx
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$ ~/artiq-dev/artiq/frontend/artiq_flash.sh -f flash_storage.img
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* Or you can set it via the runtime test mode command line
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* Boot the board.
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* Quickly run flterm (in ``path/to/misoc/tools``) to access the serial console.
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* If you weren't quick enough to see anything in the serial console, press the reset button.
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* Wait for "Press 't' to enter test mode..." to appear and hit the ``t`` key.
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* Enter the following commands (which will erase the flash storage content).
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::
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test> fserase
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test> fswrite ip xx.xx.xx.xx
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test> fswrite mac xx:xx:xx:xx:xx:xx
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* Then reboot.
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You should see something like this in the serial console: ::
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~/dev/misoc$ ./tools/flterm --port /dev/ttyUSB1
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[FLTERM] Starting...
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MiSoC BIOS http://m-labs.hk
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(c) Copyright 2007-2014 Sebastien Bourdeauducq
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[...]
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Press 't' to enter test mode...
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Entering test mode.
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test> fserase
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test> fswrite ip 192.168.10.2
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test> fswrite mac 11:22:33:44:55:66
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.. note:: The reset button of the KC705 board is the "CPU_RST" labeled button.
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.. warning:: Both those instructions will result in the flash storage being wiped out. However you can use the test mode to change the IP/MAC without erasing everything if you skip the "fserase" command.
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* (optional) Flash the ``idle`` kernel
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The ``idle`` kernel is the kernel (some piece of code running on the core device) which the core device runs whenever it is not connected to a PC via ethernet.
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This kernel is therefore stored in the :ref:`core device configuration flash storage <core-device-flash-storage>`.
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To flash the ``idle`` kernel:
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* Compile the ``idle`` experiment:
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The ``idle`` experiment's ``run()`` method must be a kernel: it must be decorated with the ``@kernel`` decorator (see :ref:`next topic <connecting-to-the-core-device>` for more information about kernels).
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Since the core device is not connected to the PC, RPCs (calling Python code running on the PC from the kernel) are forbidden in the ``idle`` experiment.
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::
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$ artiq_compile idle.py
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* Write it into the core device configuration flash storage: ::
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$ artiq_coretool cfg-write -f idle_kernel idle.elf
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.. note:: You can find more information about how to use the ``artiq_coretool`` utility on the :ref:`Utilities <core-device-access-tool>` page.
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Installing the host-side software
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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* Install the llvmlite Python bindings: ::
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$ cd ~/artiq-dev
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$ git clone https://github.com/m-labs/llvmlite
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$ git checkout artiq
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$ cd llvmlite
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$ LLVM_CONFIG=/usr/local/llvm-or1k/bin/llvm-config python3 setup.py install --user
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* Install ARTIQ: ::
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$ cd ~/artiq-dev
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$ git clone https://github.com/m-labs/artiq # if not already done
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$ cd artiq
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$ python3 setup.py develop --user
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* Build the documentation: ::
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$ cd ~/artiq-dev/artiq/doc/manual
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$ make html
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Ubuntu 14.04 specific instructions
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----------------------------------
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This command installs all the required packages: ::
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$ sudo apt-get install build-essential autotools-dev file git patch perl xutils-devs python3-pip texinfo flex bison libmpc-dev python3-serial python3-dateutil python3-prettytable python3-setuptools python3-numpy python3-scipy python3-sphinx python3-h5py python3-dev python-dev subversion cmake libusb-dev libftdi-dev pkg-config
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Note that ARTIQ requires Python 3.4 or above.
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To set user permissions on the JTAG and serial ports of the Pipistrello, create a ``/etc/udev/rules.d/30-usb-papilio.rules`` file containing the following: ::
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SUBSYSTEM=="usb", ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6010", GROUP="dialout"
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Then reload ``udev``, add your user to the ``dialout`` group, and log out and log in again: ::
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$ sudo invoke-rc.d udev reload
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$ sudo adduser <your username> dialout
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$ logout
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